Method of forming semiconductor device

Abstract

The invention relates to a semiconductor device forming method, which comprises the following steps of: providing a semiconductor substrate with a memory area, a logic area and a capacitance area, wherein the surface of the semiconductor substrate in the memory area is provided with a flash memory grid structure; respectively forming first medium layers on the surfaces of the flash memory grid structure and the capacitance area, and respectively forming first polycrystalline silicon layers on the surfaces of the first medium layers; respectively forming second medium layers on the surface of the first polycrystalline silicon layer of the capacitance area and the surface of the semiconductor substrate of the logic area, and respectively forming second polycrystalline silicon layers on the surfaces of the second medium layers; and respectively forming conducting plugs on the surfaces of the first polycrystalline silicon layer and the second polycrystalline silicon layer. The semiconductor device forming method has the advantages that the forming process is simplified, the process cost is reduced and the production efficiency is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a semiconductor device. Background technique [0002] Polysilicon-insulator-polysilicon (PIP, Poly-Insulator-Poly) capacitors and polysilicon-polysilicon-substrate (PPS, Poly-Poly-Substrate) capacitors are widely used in logic circuits or flash memory circuits to prevent noise and analog devices frequency demodulation. [0003] Please refer to figure 1 , is a structural schematic diagram of an existing PIP capacitor, including: a semiconductor substrate 10, a shallow trench isolation structure 11 is formed in the semiconductor substrate 10, and the surface of the shallow trench isolation structure 11 is connected to the surface of the semiconductor substrate 10 flush; located on the first polysilicon layer 13 on the surface of the shallow trench isolation structure 11, and the first polysilicon layer 13 is doped with N-type ions; located...

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Problems solved by technology

[0005] However, when the PIP capacitor or PPS capacitor is formed in the flash memory circuit in the existing process, the process steps will be increased, thereby increasing the process cost

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