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Converter and converter control method

A converter and pulse control technology, applied in the direction of automatic power control, high-efficiency power electronic conversion, output power conversion device, etc.

Inactive Publication Date: 2013-04-24
EMPIRE TECH DEV LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, if the discontinuity in the input pulse to the PFD is large, that is, on the order of approximately tens of microseconds or longer, recovery using the LPF is not possible
In the latter case, relatively expensive digital signal processing circuits may be required to restore

Method used

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  • Converter and converter control method
  • Converter and converter control method
  • Converter and converter control method

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Embodiment Construction

[0044] In the following detailed description, reference is made to the accompanying drawings which form a part hereof. In the drawings, similar symbols typically identify similar components, unless context dictates otherwise. The illustrative embodiments described in the detailed description, drawings, and claims are not meant to be limiting. Other embodiments may be utilized, or other changes may be made, without departing from the spirit and scope of the subject matter presented here. It should be understood that aspects of the present disclosure, as generally described herein and illustrated in the drawings, can be arranged, substituted, combined, separated and designed in many different configurations, which are expressly contemplated herein.

[0045] In particular the present disclosure relates to a method, device and / or system relating to a converter and a converter control method or a method for controlling a converter.

[0046] Briefly, techniques for converters incl...

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Abstract

Techniques are generally described for a converter including a PLL and a pulse deleting circuit. The pulse deleting circuit is configured to delete a pulse from one of the inputs to the PLL when a filtered output in the PLL falls below a first reference level and an unlocked state of the PLL is detected in response to a phase lag of one of the first and second pulse inputs with respect to the other. The pulse deleting circuit may also be configured to delete one pulse of the other of the first and second pulse inputs when the filtered output exceeds a second reference level and the unlocked state of the PLL is detected in response to a phase lead of the one of the first and second pulse inputs with respect to the other.

Description

technical field [0001] The present disclosure generally relates to a converter and a converter control method. Background technique [0002] Unless otherwise indicated, the approaches described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section. [0003] In recent years, the trend in power converters including inverters and converters has shifted to so-called resonant power converters. Resonant power converters generally employ ZVS (Zero Voltage Switching) or ZCS (Zero Current Switching) in order to improve conversion efficiency by reducing power loss, radiation noise, or transmission noise. [0004] In some cases, a resonant power converter can be negatively feedback controlled using PFM (Pulse Frequency Modulation) in order to utilize a portion of the resonant impedance curve that characterizes the nature of the resonant power converter or the converter circuit. However, such a PFM resonan...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H02M3/28
CPCY02B70/1433H03L7/08H02M3/337H02M2001/0041Y02B70/10H02M1/0041H02M1/0058H02M3/33571H02M3/01
Inventor 中山和昭
Owner EMPIRE TECH DEV LLC