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Electronic Assembly Apparatus And Associated Methods

A technology of electronic components and electronic circuits, applied in the direction of electrical components, electric solid devices, circuits, etc., can solve incompatibility and other problems

Inactive Publication Date: 2013-05-08
ALTERA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This technology also causes chipmakers to process copper microbricks and solder (lead-tin or lead-free) (different materials)
Occasionally, this technology may encounter potential incompatibilities

Method used

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  • Electronic Assembly Apparatus And Associated Methods
  • Electronic Assembly Apparatus And Associated Methods
  • Electronic Assembly Apparatus And Associated Methods

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0025] The disclosed concept relates generally to electronic assemblies and more particularly to apparatus and associated methods for 3D (three-dimensional) integration of semiconductor dies for use in electronic systems. The disclosed concepts provide a multi-die integration architecture and associated methods (eg, process flow, fabrication, fabrication, integration, etc.) using face-to-face stacking of dies.

[0026] refer to figure 1 , illustrates an arrangement 10A of various elements in an interconnect mechanism according to an example embodiment. Arrangement 10A includes main die 12 (or mother die or large device die or Die 1 ), smaller die 14 (or child die or small device die or Die 2 ), and substrate 16 . Die 14 is mounted or otherwise disposed over substrate 16 .

[0027] Main die 12 is a generally larger die with multiple levels of copper pillars. There are at least two interconnects of different heights (in this case at least two copper pillars of different heig...

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PUM

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Abstract

An apparatus includes a substrate, and first and second die. The first die is assembled above the substrate. The first die includes electronic circuitry. The second die is assembled above the substrate. The second die includes electronic circuitry. The apparatus further includes first and second interconnects. The first interconnect includes a first set of copper pillars, and couples the first die to the substrate. The second interconnect includes a second set of copper pillars, and couples the second die to the first die.

Description

[0001] Cross References to Related Applications [0002] This application claims priority to US Provisional Patent Application No. 61 / 535,800, filed September 16, 2011, and entitled "Electronic Assembly Apparatus and Associated Methods," Attorney Docket No. ALTR109P1. The aforementioned US Provisional Patent Application is hereby incorporated by reference in its entirety for all purposes. [0003] In addition, this application is related to the US Patent Application No. 13 / ____,____ filed at the same time, entitled "Electronic Assembly Apparatus and Associated Methods, Attorney's Case No. ALTR110. technical field [0004] The disclosed concept relates generally to electronic assemblies and more particularly to apparatus and associated methods for 3D (three-dimensional) integration of semiconductor dies for use in electronic systems. Background technique [0005] Unlike single chip packages, multi-chip packages interconnect several semiconductor dies. In the case of a 2D (...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L25/065H01L23/52H01L21/60H01L21/768
CPCH01L24/14H01L2224/1403H01L2224/13082H01L21/50H01L25/0657H01L2224/16145H01L2224/11845H01L24/81H01L24/17H01L23/498H01L2224/11906H01L2224/81203H01L2224/1146H01L2224/1703H01L24/13H01L2225/06517H01L2225/06513H01L2224/13147H01L2224/11474H01L24/16H01L24/11H01L2224/81191H01L2224/13111H01L2224/29099H01L2224/32225H01L2224/73253H01L2924/00014
Inventor N·沃德拉哈利J·M·隆
Owner ALTERA CORP