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Timer device and electronic apparatus

一种计时装置、计数电路的技术，应用在测量时间间隔的装置、预选时间间隔产生装置、使用原子钟的仪器等方向，能够解决端子数不富余、无法分配外部端子等问题

Inactive Publication Date: 2015-07-01
SEIKO EPSON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For this requirement, it is only necessary to provide a dedicated external terminal for selecting single mode or repeat mode on the timing IC, but as mentioned above, there may be cases where the number of terminals is not sufficient, and sometimes it is not possible to allocate a dedicated external terminal. terminal

Method used

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  • Timer device and electronic apparatus
  • Timer device and electronic apparatus
  • Timer device and electronic apparatus

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Embodiment Construction

[0046] Next, preferred embodiments of the present invention will be described in detail with reference to the drawings. In addition, the embodiment described below is not an aspect which unreasonably limits the content of this invention described in a claim. In addition, not all the configurations described below are necessarily essential components of the present invention.

[0047] 1. timing device

[0048] 1-1. The structure and function of the timing device

[0049] figure 1 is a diagram showing a configuration example of the timekeeping device of the present embodiment. The timing device 1 of the present embodiment is constituted by including the following components: a power supply circuit 10, a crystal oscillation circuit 20, a clock generation circuit 30, a preset down counter 40, a delay circuit 50, an input time judging circuit 60, a test Circuit 70 , NMOS (Negative channel Mental Oxide Semiconductor: N-type metal oxide semiconductor) transistor 80 . In additi...

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Abstract

A timer device includes a RES input terminal, an OUT output terminal, a delay circuit that delays a signal input to the RES input terminal, and a pre-settable down counter that counts a given set value, and outputs a measurement completion signal via an output terminal when the counting of the set value is completed. When a predetermined signal is input to an input terminal after an output of the measurement completion signal, the pre-settable down counter completes the output of the measurement completion signal based on a delay signal obtained by the delaying the predetermined signal using the delay circuit.

Description

technical field [0001] The invention relates to a timing device and electronic equipment. Background technique [0002] A timekeeping IC (Integrated Circuit: integrated circuit) is an IC that measures a preset time and outputs a measurement completion signal when the measurement is completed, and is used in various applications. For example, it is possible to configure a system in which after a CPU (Central Processing Unit: central processing unit) is set to a sleep mode in order to reduce power consumption, the CPU is woken up after a predetermined time elapses and a predetermined calculation process is performed. The timer IC measures the predetermined time, and inputs the outputted measurement completion signal as an interrupt signal to the CPU, and the CPU receives the interrupt signal and executes predetermined calculation processing. [0003] Two methods can be considered as a method of setting the measurement time of the timekeeping IC. One setting method is to writ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G04F5/00G04F5/14G04F10/00
CPCG04F10/00G04F3/06
Inventor 竹村诚白鸟透
Owner SEIKO EPSON CORP