Semiconductor encapsulation element and manufacture method of semiconductor encapsulation element
A semiconductor and packaging technology, which is applied in the field of semiconductor packaging and its manufacturing, can solve the problems of increasing the cost, size and area of the semiconductor packaging.
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[0055] Please refer to Figure 1A , which shows a cross-sectional view of a semiconductor package according to an embodiment of the present invention. The semiconductor package 100 is, for example, a quad flat no leads package (Quad Flat No leads, QFN), which includes a lead frame 110, at least one semiconductor chip 120, at least one bonding wire 130, a package body 140, at least one first capacitor dielectric layer 150 and at least one first capacitive conductive layer 160 .
[0056] The lead frame 110 includes a chip holder 111 and external leads 112 which are isolated from each other. The chip holder 111 is exposed from the lower surface 140 b of the package body 140 to conduct or convect the heat of the semiconductor chip 120 to the outside. The outer leads 112 have an outer side 112s exposed from an outer side 140s of the package body 140 . In addition, the external leads 112 have a lower surface 112b, and the lower surface 112b is exposed from the lower surface 140b o...
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