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Method and device for moving data

A technology of global data and data storage, applied in register devices, machine execution devices, electrical digital data processing, etc., can solve the problem of high overhead

Active Publication Date: 2016-01-13
TEXAS INSTR INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the overhead tends to be very high if there is any interaction between parallel programs, it is often difficult to efficiently use more than one or two processors for anything but completely separate programs

Method used

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  • Method and device for moving data
  • Method and device for moving data
  • Method and device for moving data

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0014] figure 2 An example of an application of an SOC performing parallel processing is shown in . In this example, an imaging device 1250 is shown and generally includes an image sensor 1252, SOC 1300, dynamic random access memory (DRAM) 1315, flash memory 1314, display 1254 and power management integrated circuit (PMIC) 1256 . In operation, image sensor 1252 is capable of capturing image information (which may be still images or video), which may be processed by SOC 1300 and DRAM 1315, and stored in non-volatile memory (ie, flash memory 1314). In addition, the image information stored in the flash memory 1314 can also be displayed on the display 1254 to the user by using the SOC 1300 and the DRAM 1315 . Also, imaging device 1250 is often portable and includes batteries as a power source; PMIC 1256 (which can be controlled by SOC 1300 ) can help regulate power usage, thereby extending battery life.

[0015] exist image 3 In , an example of a system on chip or SOC 1300 i...

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Abstract

A method is provided for moving data from a first register file in a computing unit (808i) to a second register file in a processor (1410). A signal state on the data move lead (risc?is?mtwr) is changed to indicate a data move instruction from a first register file in the compute unit to a second register file in the processor (1410). The channel address from the processor to the compute unit is provided via the first address pin (risc?is?ua). The read address from the processor to the compute unit is provided via the second address pin (risc?is?ra), and the data is passed from the first register file in the compute unit to the processor via the data interface pin (node?regf?rd) second register file in the processor.

Description

technical field [0001] The present disclosure relates generally to processors, and more particularly to processing clusters. Background technique [0002] 1 is a graph depicting speedup versus parallel overhead for execution rates for multi-core systems (ranging from 2 to 16 cores), where speedup is single processor execution time divided by parallel processor execution time. It can be seen that the parallel overhead must be close to zero to gain significant benefit from a large number of cores. However, since the overhead tends to be very high if there is any interaction between parallel programs, it is often difficult to efficiently use more than one or two processors for anything but completely separate programs. Therefore, it is necessary to improve processing clusters. Contents of the invention [0003] Accordingly, an embodiment of the invention provides a method. The method is characterized by changing the state of a signal on the data movement lead (risc_is_mtvv...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/14G06F13/38
CPCG06F9/30G06F9/30054G06F9/30101G06F9/355G06F9/3552G06F9/3853G06F9/3891G06F15/16G06F15/8053G06F8/40G06F9/3012G06F9/3887G06F9/30076G06F9/3888G06F9/38873G06F9/323G06F9/38875G06F15/80
Inventor W·约翰森J·W·戈楼茨巴茨H·谢赫A·甲雅拉S·布什M·琴纳坤达J·L·奈T·纳加塔S·古普塔R·J·尼茨卡D·H·巴特莱G·孙达拉拉彦
Owner TEXAS INSTR INC