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A Simulation and Analysis Method for On-Resistance of Trench MOS Devices

A MOS device, simulation analysis technology, applied in the fields of instruments, electrical digital data processing, special data processing applications, etc., can solve problems such as the inability to provide the direction of device optimization, the inability to intuitively estimate the resistance, and the inability to quickly find out

Active Publication Date: 2017-02-08
CHINA RESOURCES MICROELECTRONICS (CHONGQING) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

At present, the academic community has theoretically deduced the formulas of the resistances of the various parts that make up the on-resistance Ron, but these formulas are more theoretical and idealized, and the parameters in them are quite different from the actual production process parameters of modern Trench MOS. Therefore, an accurate and intuitive estimate of the resistance of each part cannot be given.
However, the simulation analysis method of the on-resistance of the device currently only uses TCAD software to calculate the current of the device, and then calculates the resistance of the entire device, and does not perform simulation analysis and calculation of the components that make up the on-resistance, so it cannot be quickly Find out the part that affects the conduction of the device, so it cannot provide a direction for fast and targeted optimization of the device

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Embodiment Construction

[0034] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0035] see Figure 1 to Figure 5 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arb...

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Abstract

The invention provides a simulation analysis method of the conduction resistance of a channel type MOS device. The simulation analysis method includes the following steps that firstly, a first model including a substrate, a drift zone, a body zone, a source zone and a channel structure is built up; currents are simulated, and the source leakage resistance R1 is calculated; thirdly, after the substrate is removed, the currents are simulated, the resistance R2 at the moment is calculated, and the substrate resistance R3 is R1-R2; fourthly, the drift area is thinned, high-concentration doping is performed on the thinned drift zone, the currents are simulated, and the total resistance R4 of channel and source diffusion is calculated; fifthly, the thickness of an electronic accumulation layer is measured, a high-concentration doping area of the drift area is transferred below the electronic accumulation layer, the resistance R5 at the moment is calculated, and the resistance R6 of the electronic accumulation layer is R5-R4; sixthly, the resistance R7, which is R1-R3-R4-R6, of the drift area is calculated. According to the simulation analysis method, the substrate resistance, the channel resistance, the accumulation layer resistance and the drift area resistance can be directly and effectively obtained, and a direction is provided for optimization of the device by analyzing the occupied rate of the resistance of all the parts.

Description

technical field [0001] The invention belongs to the field of simulation analysis of semiconductor devices, in particular to a method for simulation analysis of the on-resistance of a trench type MOS device. Background technique [0002] Trench MOS device (Trench MOS) transistor is a new type of vertical structure device developed on the basis of VDMOS (Vertical Double Diffused Metal-Oxide Semiconductor Field Effect Transistor), both of which are high cell density devices . However, compared with the former, this structure has many performance advantages: such as lower on-resistance, low gate-to-drain charge density, thus low conduction and switching losses and fast switching speed. At the same time, since the channel of the trench MOS is vertical, the channel density can be further increased and the chip size can be reduced. [0003] Trench MOS device (Trench MOS), as an important power device, is widely used in DC-DC conversion, voltage regulator, power management module,...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
Inventor 王艳颖郑泽人彭宇
Owner CHINA RESOURCES MICROELECTRONICS (CHONGQING) CO LTD