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Method for manufacturing VDMOS

A metal, N-type technology, used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problem of inconvenient use of VDMOS, and achieve the effect of VDMOS convenience

Active Publication Date: 2014-08-20
FOUNDER MICROELECTRONICS INT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0026] The embodiment of the present invention provides a method for manufacturing VDMOS, which is used to solve the problem of inconvenient use of the VDMOS manufactured by the existing method for manufacturing VDMOS

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  • Method for manufacturing VDMOS
  • Method for manufacturing VDMOS
  • Method for manufacturing VDMOS

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Embodiment Construction

[0042] A specific implementation of a method for fabricating a VDMOS provided by an embodiment of the present invention will be described below with reference to the accompanying drawings.

[0043] A method for fabricating VDMOS provided by an embodiment of the present invention is that in the existing method for fabricating VDMOS, gate oxide is grown on the active region and the ring region, after the gate oxide layer is formed, and before polysilicon is deposited on the gate oxide layer , adding a step of forming a threshold injection layer under the upper surface of the N-type epitaxial layer.

[0044] Combine below Figure 3A to Figure 3K , to illustrate the process of making VDMOS provided by the embodiment of the present invention, specifically, it can be realized through the following steps:

[0045] Step one, such as Figure 3A As shown, an N-type substrate 301 is provided, and an N-type epitaxial layer 302 is formed on the first surface of the substrate.

[0046] S...

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Abstract

The embodiment of the invention provides a method for manufacturing a VDMOS. The method comprises the following steps: providing an N type substrate and forming an N type epitaxial layer at a first surface of the substrate; growing field oxide at the N type epitaxial layer to form a field oxidation layer; etching an active zone at the field oxidation layer and injecting N type ions and carrying out driving; etching at least one ring zone at the field oxidation layer and injecting P type ions into the ring zone; growing gate oxide at the active zone and the ring zone to form a gate oxidation layer; forming a threshold injection layer below the upper surface of the N type epitaxial layer; depositing polycrystalline silicon at the gate oxidation layer to form a polycrystalline layer used as a grid electrode of a VDMOS; injecting P type ions into the active zone and the two sides of the polycrystalline silicon layer and carrying out driving; forming a source electrode of the VDMOS at the zone with driven P type ions; carrying out reduction on a second surface of the substrate and growing a metal layer at the reduced second surface to form a drain electrode of the VDMOS. With the method, the voltage can be adjusted at any time; and the method can be implemented conveniently.

Description

technical field [0001] The invention relates to the technical field of semiconductor chip manufacturing technology, in particular to a method for manufacturing a VDMOS device. Background technique [0002] At present, the existing process for fabricating a vertical double-diffused metal-oxide semiconductor field-effect transistor (VDMOS) usually includes the following fabrication process: [0003] Step one, such as Figure 1A As shown, an N-type substrate 101 is provided, and an N-type epitaxial layer 102 is formed on the first surface of the substrate. [0004] Step two, such as Figure 1B As shown, oxygen is field-grown on the N-type epitaxial layer 102 to form a field oxide layer 103 . [0005] In this step 2, it is preferable to perform field oxygen growth in the range of 1100-1200 degrees, and the thickness of the field oxide layer 103 can be formed between 0.8-1.4 microns. The reason why this layer is formed is mainly for isolation use; [0006] Step three, such as...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336
CPCH01L21/28035H01L29/66712
Inventor 闻正锋赵文魁
Owner FOUNDER MICROELECTRONICS INT