Semiconductor wafer structure combined with substrate through hole and metal bump and its manufacturing method

Abstract

The invention discloses a semiconductor chip structure with a substrate through hole and a metal protrusion block being combined and a processing method thereof. The structure comprises a substrate, at least one substrate through hole, at least one back-surface metal layer, at least one first metal layer, at least one semiconductor electronic component and at least one metal protrusion block. The first metal layer and the semiconductor electronic component are formed on the front surface of the substrate; the metal protrusion block is formed on the first metal layer; the substrate through hole runs through the substrate; and the back-surface metal layer is formed on the back surface of the substrate, covers the substrate through hole, at least covers a portion of the back surface of the substrate, and is contacted with the at least a portion of the first metal layer located at the top portion of the substrate through hole. With the application of the structure in the invention, the connection density of the semiconductor components can be improved helpfully, the size of a chip can be greatly reduced, signal transmission speed is increased, meanwhile, power consumption can be reduced, and heterogeneous integration can also be provided.

Description

technical field [0001] The present invention relates to a semiconductor wafer structure combined with substrate through holes and metal bumps and its manufacturing method; using the structure of the present invention, stacking of flip-chip wafers can be produced, which helps to increase the connection density of semiconductor elements and reduce the size of the wafer And increase the transmission speed of the signal. Background technique [0002] In the manufacturing process of semiconductor devices, in order to reduce the area of ​​semiconductor chips, a flip-chip chip stacking technology has been developed. This chip stacking technology usually uses copper pillars of metal bumps as contacts between the upper and lower chips of the flip-chip stack, and conducts and transmits signals through the copper pillars of metal bumps. Figure 1A is a schematic cross-sectional structure diagram of a semiconductor chip with copper pillar bumps in the prior art, wherein the structure se...

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Problems solved by technology

[0003] Although such a design can achieve the effect of 3D flip-chip chip stacking, however, the connection density of the circuit is still very limited, so it is still limited to reduce the size of the chip, and the signal transmission speed cannot be effectively improved, so the overall chip size Power consumption is still high

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