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A rectifier chip manufacturing process

A manufacturing process and rectifier technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as inability to withstand higher ESD test voltages, inability to meet test requirements, etc., to achieve low power consumption, high ESD static resistance Testability, the effect of improving functional characteristics

Active Publication Date: 2018-08-14
YANGZHOU HY TECH DEV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] Judging from the current conventional ESD test of ordinary bridge rectifiers, in the standard air mode, it can usually withstand about 2KV test. In order to increase the test withstand voltage, after analysis, it is mainly the chip of the rectifier, which adopts the conventional production method , its performance cannot withstand higher ESD test voltage, so it cannot meet customer test requirements after assembly

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0032] A rectifier chip manufacturing process, comprising the following steps:

[0033] (1) Put the silicon wafer into the mixed acid for thinning, the corrosion time is 10s, and quickly put it into the third-grade flowing pure water to rinse after the etching, until the residual acid on the silicon wafer is rinsed clean, and the water resistance value reaches above 10Ωcm;

[0034] (2) The silicon wafers are cleaned by ultrasonic vibration with Harmo solution and hot pure water respectively. After cleaning, a paper-like phosphorus source with a concentration of 70% is selected, sandwiched between two silicon wafers, and arranged on a quartz boat in turn. After exhausting, enter the diffusion furnace for phosphorus source pre-deposition, and then perform phosphorus slicing and sandblasting;

[0035] (3) Clean the silicon wafers according to the cleaning method in step (2). For the cleaned silicon wafers, put the sides that have been pre-deposited with phosphorus sources in pair...

Embodiment 2

[0044] A rectifier chip manufacturing process, comprising the following steps:

[0045] (1) Put the silicon wafer into the mixed acid for thinning. The corrosion time is 15s. After the etching is completed, quickly put it into the third-grade flowing pure water to rinse until the residual acid on the silicon wafer is rinsed clean, and the water resistance value reaches more than 10Ωcm;

[0046] (2) The silicon wafers are cleaned by ultrasonic vibration with Harmo solution and hot pure water respectively. After cleaning, a paper-like phosphorus source with a concentration of 80% is selected, sandwiched between two silicon wafers, and arranged on a quartz boat in turn. After exhausting, enter the diffusion furnace for phosphorus source pre-deposition, and then perform phosphorus slicing and sandblasting;

[0047] (3) Clean the silicon wafers according to the cleaning method in step (2). For the cleaned silicon wafers, put the sides that have been pre-deposited with phosphorus so...

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Abstract

The invention relates to a rectifier chip making process which comprises the following steps: (1) a silicon wafer is put in mixed acid and thinned; (2) cleaning, phosphorus attaching, phosphorus source pre-deposition, phosphorus slicing and sandblasting are sequentially carried out on the silicon wafer obtained from (1); (3) cleaning, boron coating, phosphorus source pushing and oxide layer removing are sequentially carried out on the sandblasted silicon wafer; (4) cleaning, boron coating, boron diffusion and boron slicing are sequentially carried out on the silicon wafer of which the oxide layer removed; and (5) a means of glass passivation is adopted, and chemical nickel plating is performed to complete chip making. A product made by the method of the invention has high stability and high reliability.

Description

technical field [0001] The invention relates to the technical field of semiconductor high-power rectifier devices, in particular to a rectifier chip manufacturing process. Background technique [0002] Judging from the current conventional ESD test of ordinary bridge rectifiers, in the standard air mode, it can usually withstand about 2KV test. In order to increase the test withstand voltage, after analysis, it is mainly the chip of the rectifier, which adopts the conventional production method , its performance cannot withstand higher ESD test voltage, so it cannot meet customer test requirements after assembly. Contents of the invention [0003] The technical problem to be solved by the present invention is to provide a rectifier chip manufacturing process to solve the deficiencies in the prior art, so that the product can withstand higher test voltage. [0004] The technical scheme that the present invention solves the problems of the technologies described above is as...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/02H01L21/223
CPCH01L21/02052H01L21/02096H01L21/2225
Inventor 王道强魏庆山
Owner YANGZHOU HY TECH DEV