A Low Dropout Linear Regulator with High Power Supply Rejection Ratio
A low dropout linear, high power supply rejection technology, applied in the direction of instruments, electric variable adjustment, control/regulation systems, etc., to ensure loop stability, provide low-frequency gain, and improve the effect of suppression
Inactive Publication Date: 2015-10-21
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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[0013] In the traditional LDO structure, the main pole setting is usually low, so the PSRR begins to attenuate at the main pole. At the same time, due to the influence of parasitic capacitance, the power supply noise in the mid-frequency band will pass through the power tube g due to the power tube gate-source voltage difference. m generate noise current to the output, which limits the PSRR
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[0031] Such as Figure 4As shown, the specific circuit structure of this example is, this example consists of PMOS tubes MP, MP1, MP2, MP3, MP4, MP5, MP6, MP7, MP8, MP9, MP10, MP11, NMOS tubes MN1, 7N2, MN3, MN4, MN5, MN6, MN7, MN8, MN9, MN10, MN11, MN12, MN13, MN14, MN15 are composed of current source, resistor R, and capacitor C; among them, the positive pole of the current source is connected to the external power supply VDDA, and the negative pole is connected to the drain of MN10 ; The drain of MN10 is interconnected with the gate, its gate is connected to the gate of MN9, and its source is grounded; the source of MN9 is grounded, and its drain is connected to the drain of MP5; the source of MP5 is connected to the external power supply VDDA, and its The drain is connected to the gate, and its gate is connected to the gate of MP3; the source of MP3 is connected to the external power supply VDDA, and its drain is connected to the source of MP1; the gate of MP1 is connected...
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The invention relates to the technical field of analogue integrated circuits, and particularly relates to a low dropout linear regulator with the large power supply rejection ratio. In order to eliminate gate-source small-signal difference of a power tube MP, another branch GmVin is introduced into the gate end of the traditional LDO power tube and used for sampling small-signal disturbance at the input end, the VGS of the gate-source end is kept unchanged, and therefore the influence on the PSR by the item is eliminated. The low dropout linear regulator has the advantages that the power source inhibiting ability of the medium frequency end of the LDO is improved, a self-adaptive adjusting technology is adopted for an error amplifier, the error amplifier is biased by sampling a certain loading current, so that when loads of a whole circuit change, low frequency gains are provided to the maximum extent while loop stability is ensured, and the ability to inhibit power source noise is improved to a certain degree. The low dropout linear regulator is particularly suitable for the low dropout linear regulator field.
Description
technical field [0001] The invention belongs to the technical field of analog integrated circuits, and in particular relates to a low-dropout linear voltage regulator with high power supply rejection ratio characteristics. Background technique [0002] Low Dropout Regulator (LDO), as the main component of modern power management chips, is characterized by no switching action in the working process, low noise, simple design of the whole unit, small number of components, and small chip area Easy to integrate. The main technical indicators of LDO include: dropout voltage, line regulation rate, load regulation rate, power supply rejection ratio (Power Supply Rejection, PSRR), load transient response, etc. [0003] The basic structure of LDO is as figure 1 As shown, it is composed of error amplifier, power tube Mp, resistors Rp, R1, R2, Rload, capacitors Cp, Cload; the error amplifier adjusts the power tube M by amplifying the difference between the feedback voltage and the ref...
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IPC IPC(8): G05F3/26
Inventor 甄少伟王磊杨云许志斌贺雅娟张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA