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Novel quad fat no-lead package process method

A four-sided leadless, packaging process technology, used in electrical components, electrical solid-state devices, semiconductor/solid-state device manufacturing, etc., can solve problems such as high structural strength, achieve high strength, improve product yield, and avoid production costs. Effect

Inactive Publication Date: 2015-01-07
JCET GROUP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The purpose of the present invention is to overcome the above disadvantages and provide a new four-sided leadless packaging process method, which uses a metal substrate and forms a bump (the upper half of the base island and the pin) on the upper surface of the metal substrate by forging. The pins are not separated before encapsulation, and the pins are divided by etching or cutting after encapsulation. Since the frame is designed in one piece during the wiring operation, its structural strength is very strong, and there will be no shaking during the wiring operation. , not only can easily adopt the copper wire bonding process, but also can avoid the problems of solder balls falling off or poor gaps; in addition, there will be no flashing problems during encapsulation, so this design can not only improve production efficiency, but also effectively improve product quality. yield and reliability

Method used

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  • Novel quad fat no-lead package process method
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  • Novel quad fat no-lead package process method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0030] Example 1: chip is installed

[0031] Step 1. Take a metal substrate, and the material of the metal substrate is copper or iron like the conventional substrate;

[0032] Step two, see figure 1 , Punch out positioning holes on the metal substrate and form bumps (the upper half of the base island and pins) on the front of the metal substrate by stamping or forging;

[0033] Step three, see figure 2 , image 3 ,in image 3 for figure 2 The A-A cross-sectional view of the metal substrate is mounted on the front of the wire;

[0034] Step 4. Carry out plastic sealing work on the front of the metal substrate;

[0035] Step 5. Electroplating a metal layer on the back of the metal substrate. The material of the metal layer is pure tin, silver or nickel-palladium-gold, etc.;

[0036] Step six, see Figure 4 , Figure 5 ,in Figure 5 for Figure 4 Cutting or etching from the back of the metal substrate, cutting or etching to the bottom of the molding compound, so as...

Embodiment 2

[0039] Embodiment 2, flip-chip

[0040] Step 1. Take a metal substrate, and the material of the metal substrate is copper or iron like the conventional substrate;

[0041] Step two, see Figure 8 , Punch out positioning holes on the metal substrate and form bumps (the upper half of the base island and pins) on the front of the metal substrate by stamping or forging;

[0042] Step three, see Figure 9 , Figure 10 ,in Figure 10 for Figure 9 The C-C sectional view of the chip mounting and reflow soldering on the front of the metal substrate;

[0043] Step 4. Carry out plastic sealing work on the front of the metal substrate;

[0044] Step 5. Electroplating a metal layer on the back of the metal substrate. The material of the metal layer is pure tin, silver or nickel-palladium-gold, etc.;

[0045] Step six, see Figure 11 , Figure 12 ,in Figure 12 for Figure 11 The D-D cross-sectional view, cutting or etching from the back of the metal substrate, cutting or etchin...

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Abstract

The invention relates to a novel quad fat no-lead package process method. The method includes the following steps that firstly, a metal substrate is fetched; secondly, locating holes are punched in the metal substrate, and bumps are formed on the front side of the metal substrate in a punching or forging-pressing mode; thirdly, chip package routing or chip package reflow soldering is carried out on the front side of the metal substrate; fourthly, plastic package is conducted on the front side of the metal substrate; fifthly, metal layer electroplating is conducted on the back side of the metal substrate; sixthly, cutting or etching is conducted from the back side of the metal substrate; seventhly, cutting or etching clearance zones of leads and base islands of the back side of the metal substrate are coated with green paint; eighthly, a plastic package body is cut to obtain independent package units. According to the novel quad fat no-lead package process method, because a frame is integrally designed during routing, structural strength is very high, shaking cannot be caused during routing, production efficiency can be improved, and the yield and reliability of products can be effectively improved.

Description

technical field [0001] The invention relates to a novel four-sided leadless packaging process method, in particular to a multi-circle four-sided leadless package process method, which belongs to the technical field of integrated circuit or discrete component packaging. Background technique [0002] The traditional QFN (four-sided no-lead) package, its package form is mainly packaged in a cell array frame and then cut into independent units, and its substrate is a frame with etched back film, which mainly has the following shortcomings: [0003] 1. The conventional QFN frame is based on the etching process, the production cost is high, and the conventional QFN frame needs to be filmed. To achieve high strength and stability, it is also necessary to paste an expensive thermosetting frame film, which doubles the cost of the frame; [0004] 2. In addition, the encapsulation of conventional QFN products is prone to overflow, which is the biggest defect in the conventional QFN pro...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/50H01L21/60
CPCH01L24/97H01L2224/16245H01L2224/48091H01L2224/48247H01L2924/00014
Inventor 于睿张航宇龚臻刘怡
Owner JCET GROUP CO LTD