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Packaging assembly and manufacturing method of packaging assembly

A technology for packaging components and packaging materials, which is used in semiconductor/solid-state device manufacturing, printed circuit manufacturing, electrical components, etc., and can solve the problems of large packaging area and adverse effects on the performance of semiconductor components. The effect of improving reliability

Active Publication Date: 2015-01-07
SILERGY SEMICON TECH (HANGZHOU) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] In view of this, the object of the present invention is to provide a packaging assembly to solve the problems of excessive packaging area and adverse effects of packaging structure on the performance of semiconductor elements in the prior art

Method used

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  • Packaging assembly and manufacturing method of packaging assembly
  • Packaging assembly and manufacturing method of packaging assembly
  • Packaging assembly and manufacturing method of packaging assembly

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Embodiment Construction

[0040] Various embodiments of the invention will be described in more detail below with reference to the accompanying drawings. In the various drawings, the same elements are denoted by the same or similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale. For simplicity, the package structure obtained after several steps can be described in one figure.

[0041] It should be understood that when describing a package structure, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may refer to being directly on another layer or another region, or on There are other layers or regions between it and another layer or another region. And, if the device is turned over, the layer, one region, will be "below" or "beneath" the other layer, another region. If it is to describe the situation directly on another layer or another area, the expression "directly on" or "on and adjacent to" ...

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PUM

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Abstract

The invention discloses a packaging assembly and a manufacturing method of the packaging assembly. The packaging assembly comprises a plurality of electronic elements, lead frames, packaging materials and heat sinks, wherein the electronic elements are stacked into at least two layers, the lead frames are in solder connection with the multiple electronic elements, the lead frames and the multiple electronic elements are at least partially covered with the packaging materials to enable at least parts of leads of the lead frames to be exposed out from the packaging materials, and each heat sink at least comprises a first part between at least two electronic elements located on the adjacent layers and provides a public radiating path for the electronic elements on the adjacent layers. By means of the packaging assembly, radiating of the stacked packaging assembly can be improved, and the reliability of the packaging assembly can be improved.

Description

technical field [0001] The present invention relates to semiconductor packaging, and in particular to packaging components and methods of manufacturing the same. Background technique [0002] With the increasing demand for miniaturization, light weight and multi-functionalization of electronic components, the requirements for semiconductor packaging density are getting higher and higher, so as to achieve the effect of reducing the package size. Therefore, a package assembly using a lead frame and containing multiple integrated circuit dies has become a new hot topic. In such a package, the configuration of the multiple integrated circuit dies and their connection method have a critical impact on the size and performance of the package. [0003] figure 1 A perspective view of a multi-die package assembly 100 according to the prior art is shown. In the package assembly 100 , two integrated circuit dies 120 , 130 are mounted side-by-side on the same lead frame 110 . The lea...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L23/367H01L21/50
CPCH01L23/3121H01L23/3135H01L24/13H01L24/16H01L24/29H01L24/32H01L24/48H01L24/81H01L2224/0401H01L2224/131H01L2224/13111H01L2224/16235H01L2224/16245H01L2224/2919H01L2224/32145H01L2224/32245H01L2224/48247H01L2224/73265H01L2224/81815H01L2924/13055H01L2924/13091H01L2924/14H01L2924/19042H01L2924/19043H01L2924/19102H01L2924/19103H01L23/4334H01L23/49548H01L23/49558H01L23/49575H01L2924/181H01L2924/19107H01L2924/00014H01L2924/014H01L2924/00012H01L2224/45099H01L2224/45015H01L2924/207H05K3/284H05K1/181H05K3/3421H05K7/205H01L21/4871
Inventor 叶佳明谭小春
Owner SILERGY SEMICON TECH (HANGZHOU) CO LTD