Method for manufacturing polycrystalline silicon resistor with low temperature coefficient

Abstract

The invention discloses a method for manufacturing a polycrystalline silicon resistor with a low temperature coefficient. The method comprises the steps that (1) a polycrystalline silicon film is grown on a silicon substrate; (2) P-type low concentration doping is carried out; (3) photoetching exposure and development of high-resistance polycrystalline silicon is carried out, and N-type doping is carried out on the area except the high-resistance polycrystalline silicon; (4) optical resist is removed, and a silicon nitride film is deposited; (5) N-type polycrystalline silicon and high-resistance polycrystalline silicon are formed through one-off etching; (6) shallow doping and leakage injection are carried out, silicon nitride is grown, and the silicon nitride on word lines and the high-resistance polycrystalline silicon is etched off; (7) P-type heavy doping is carried out on a source area, a drain area and part of the high-resistance polycrystalline silicon, so that a P-type source area, a P-type drain area and P-type polycrystalline silicon are formed. According to the method, through mutual doping, under the condition that the number of photolithography masks is minimum, the fact that the high-resistance polycrystalline silicon, the low-resistance P-type polycrystalline silicon and the N-type polycrystalline silicon are formed at the same time in the manufacturing process of the polycrystalline silicon resistor with the low temperature coefficient is achieved.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to a method for manufacturing low temperature coefficient polysilicon resistors. Background technique [0002] At present, there are many application requirements in the market that require precise control of current, that is, current fluctuations are extremely small with temperature changes, so low temperature coefficient resistors are widely used. If high-resistance polysilicon, low-resistance P-type polysilicon and N-type polysilicon can be realized in the same process, customers' applications and choices will be more flexible. [0003] In the SONOS process, in order to greatly reduce the area of ​​the device, the technology of self-aligned holes is used. It is necessary to cover a layer of silicon nitride film on the surface of the polysilicon as a barrier layer for contact hole etching, which is used to ensure the contact hole etching. During the etching process...

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Problems solved by technology

But at the same time, the problem is that due to the existence of silicon nitride film on the surface of polysilicon, subsequent source and drain implants cannot be injected into polysilicon, and N-type and P-type polysilicon cannot be formed at the same time.

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