Low power wola filter bank and its integrated stage circuit
A filter bank and low power consumption technology, which is applied in hearing aids, electrical components, adaptive networks, etc., can solve the problem of high power consumption of WOLA filters, reduce dynamic flipping power consumption, reduce the number of clock cycles, and reduce the number of times Effect
Active Publication Date: 2017-06-30
北京中科芯蕊科技有限公司
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[0028] In the process of realizing the present invention, the applicant realized that the prior art WOLA filter bank has the following technical problems: due to the multiple read and write operations of the memory, the power consumption of the WOLA filter is relatively high
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[0080] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.
[0081] The basic ideas of the present invention are: ① reduce the memory read and write operations with large power consumption overhead as much as possible; consumption. Hereinafter, unless otherwise specified, each parameter is an integer greater than 1, such as L A , L S , r, k, etc.
[0082] In a basic embodiment of the present invention, a WOLA filter bank analysis stage circuit is disclosed. figure 2 It is a schematic structural diagram of the analysis stage circuit 1 of the embodiment of the present invention. Such as figure 2 As shown, the analysis stage circuit 10 of this embodiment includes: an input buffer module 102, a sample sequence storage module (hereinafter referred to as Srcddata_mem) 106, an anal...
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The invention discloses a low-power-consumption WOLA (Weighted Overlap Add) filter set and a comprehensive phase circuit thereof, which are applicable to a digital hearing aid adopting a multi-channel signal processing technology. The times of memorizer reading-writing operation with greater power consumption are directly reduced by carrying out multiplying-accumulation and multiplying-adding calculation by adopting non-continuous address reading data, carrying out model addressing, carrying out operation of changing an initial reading-writing address to replace data displacement, using a memorizer of a folded structure and a logic decoding circuit to replace a memorizer to store a window coefficient with a fixed numerical value, and the like. Meanwhile, the memorizer with a dual-calculation unit combined folded structure is adopted so that two paths of calculation are executed in parallel, and furthermore, clock periods needed by the operation of a whole system are further reduced; therefore, the dynamic overturning power consumption is reduced by conveniently adopting a system clock frequency reducing or clock door control technology.
Description
[0001] This application is a divisional application, the application number of the parent application: 201110252568.9, the application date: August 30, 2011, and the name: low power consumption WOLA filter bank and its analysis and synthesis stage circuit. technical field [0002] The invention relates to the technical field of digital signal processing in the electronic industry, in particular to a low-power consumption WOLA filter bank and a comprehensive stage circuit thereof. Background technique [0003] Digital hearing aids are portable medical electronic devices that have strict requirements on low power consumption. In almost all current high-end digital hearing aid systems, methods based on multi-channel signal processing are used to realize functions such as loudness compensation and noise cancellation. [0004] In multi-channel signal processing, the Discrete Fourier Transform (DFT) filter bank is the most commonly used uniform bandwidth filter bank, and the WOLA ...
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IPC IPC(8): H04R25/00H03H21/00
Inventor 于增辉黑勇周玉梅陈黎明徐欣锋
Owner 北京中科芯蕊科技有限公司