Method for manufacturing semiconductor device

Abstract

The invention discloses a method for manufacturing a semiconductor device. The method includes the following steps that: a semiconductor substrate is provided, and a pad oxide layer and a pad nitride layer are formed on the semiconductor substrate sequentially; the pad nitride layer, the pad oxide layer and a part of the semiconductor substrate are patterned, so that trenches can be formed; a first oxide layer is formed at the pad nitride layer as well as the bottoms and side surfaces of the trenches; a nitride layer is formed on the first oxide layer; a second oxide layer is formed on the nitride layer; the second oxide layer is planarized until planarization reaches the pad nitride layer, so that a part of the second oxide layer can be removed; and the pad nitride layer and the pad oxide layer are removed, so that the semiconductor substrate can be exposed. With the manufacturing process of the invention adopted, voids and channels will not appear in shallow trench isolation structures after side wall structures are formed through etching, and therefore, the problem of PDM gap filling, the problem of reliability reduction of dielectrics in a semiconductor device and the problem of a short-circuit phenomenon occurring on a closed circuit in the semiconductor device which are caused by the above problems can be solved, and the performance and electric reliability of the semiconductor device can be improved.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for manufacturing a semiconductor device. Background technique [0002] As the microelectronics process enters the deep submicron stage, in order to realize high-density, high-performance large-scale integrated circuits, the isolation process between semiconductor devices becomes more and more important. The existing technology generally uses shallow trench isolation technology to realize the isolation of active devices, such as in complementary metal oxide semiconductor (CMOS) devices, NMOS (N-type metal oxide semiconductor) transistors and PMOS (P-type metal oxide semiconductor) The isolation layers between the transistors are all formed by shallow trench isolation technology. [0003] Shallow trench isolation technology has gradually replaced other isolation methods used in traditional semiconductor device manufacturing, such as local silicon oxidation. Compa...

AI Technical Summary

Problems solved by technology

With the accumulation and miniaturization of products, it is more difficult to form a good isolation structure in the semiconductor manufacturing process. The voids formed in the STI region after etching to form a sidewall structure will affect the performance of semiconductor devices. For example, Multiple wet cleaning process steps before deposition to form a pre-metal dielectric layer (PMD, pre-metaldielectric), this wet cleaning step will cause PDM gap filling problems, reduce the reliability of the dielectric in semiconductor devices, and cause semiconductor A short circuit occurs in the vias in the device

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