Test mode setting circuit and setting method
A test mode and circuit setting technology, applied in the direction of electronic circuit testing, etc., can solve the problem of a large number of ports, and achieve the effect of reducing package size and production cost
Active Publication Date: 2017-05-24
SILERGY SEMICON TECH (HANGZHOU) CO LTD
View PDF5 Cites 0 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
[0005] In view of this, the object of the present invention is to provide a test mode setting circuit and a setting method, to solve the technical problem that the number of ports required to enter the test mode in the prior art is large
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0018] The present invention will be described in more detail below in conjunction with schematic diagram, wherein shows the preferred embodiment of the present invention, it should be understood that those skilled in the art can transform and replace the specific circuit of the present invention within the scope of the claims on the basis of this description, while still achieving the advantageous effects of the present invention. The following descriptions are not intended to limit the invention.
[0019] In the following paragraphs the invention is described more specifically by way of example with reference to the accompanying drawings. It should be noted that all the drawings are in simplified form and use inaccurate scales, which are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.
[0020] The basic solution of the present invention is to provide a test mode setting circuit, which is applied to an integrat...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
The invention discloses a test mode setting circuit and a test mode setting method. The test mode setting circuit is applied to an integrated circuit with an output voltage port, and comprises a mode trigger circuit and a pulse width detection circuit; the first input end of the mode trigger circuit is electrically connected with an output voltage port, while the second input end is used for receiving a reference signal, and the output end of the mode trigger circuit is connected with the pulse width detection circuit; during test mode setting, the output voltage port of the integrated circuit applies a mode trigger signal, the mode trigger signal is compared with a reference signal to generate a pulse signal, the pulse width detection circuit receives the pulse signal and detects the pulse width of the pulse signal before outputting a pulse width detection signal, and the test mode setting circuit enters a corresponding test mode according to the pulse width detection signal. The test mode setting circuit is capable of satisfying the setting of the test mode of a chip with few ports; no special port needs to be added additionally, and therefore, the packaging dimension and the production cost of the chip are reduced.
Description
technical field [0001] The invention relates to the technical field of integrated circuit testing, in particular to a test mode setting circuit and setting method for integrated circuits. Background technique [0002] During the packaging process of the chip, due to packaging stress and other factors, the characteristic parameters of the chip may drift. Therefore, after the chip is packaged, testing and debugging are required to ensure that each chip can meet the requirements of product specifications. In order to facilitate the testing of the chip, a test mode setting circuit is integrated in the chip, and the chip can be tested after the chip enters the test mode. The test mode setting circuit requires that it cannot affect the normal application of the chip and will not cause parasitic effects on the chip. [0003] Generally, when testing, a specific signal is added to the corresponding port of the chip to activate the built-in test mode setting circuit to enter the test...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/28
Inventor 黄智
Owner SILERGY SEMICON TECH (HANGZHOU) CO LTD