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A voltage signal demodulation circuit

A technology for demodulating circuits and voltage signals, which is applied in the field of voltage signal demodulating circuits, which can solve the problems of lower bus voltage, production of slave chips, and unsatisfactory working environment, etc., and achieve the requirements of reducing lines, reliable operation, and wide operating voltage range effect

Active Publication Date: 2017-12-12
云南卓烁科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In actual use, when the bus is damp, grounded or damaged, the bus voltage will be greatly reduced, causing undamaged slaves to fail to respond normally, making troubleshooting and line maintenance difficult
[0005] In fact, the manufacturer did not strictly follow the standard requirement of 10V range to produce the slave station chip, they reduced the recognition range to about 7V, thus weakening the anti-interference ability of the slave station
But even so, it cannot satisfy the above-mentioned working environment where the terminal modulation amplitude is 5V
Moreover, the amplitude recognition voltage of 7V limits the minimum working voltage of the chip. Currently, common products on the market can only work in a working environment above 20V.

Method used

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  • A voltage signal demodulation circuit
  • A voltage signal demodulation circuit
  • A voltage signal demodulation circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0052] See figure 2 , figure 2 It is a negative feedback circuit diagram embodiment.

[0053] The proportional sampling circuit includes a first resistor (R1), a second resistor (R2) and a third resistor (R3), and their specific connection methods are as follows:

[0054] The input signal flows through the first resistor (R1), the second resistor (R2), and the third resistor (R3) connected in series to the ground in sequence;

[0055] The first voltage sampling point is formed at the connection between the first resistor (R1) and the second resistor (R2), and is output to the sampling hysteresis circuit;

[0056] A second voltage sampling point is formed at the junction of the second resistor (R2) and the third resistor (R3), and is output to the positive input terminal of the comparator.

[0057] The difference between the two sampling signals is R2 / (R1+R2+R3) times of the input voltage, which changes with the input voltage.

[0058] The sampling hysteresis circuit includ...

Embodiment 2

[0102] See image 3 , image 3 It is the positive feedback circuit diagram embodiment.

[0103] The proportional sampling circuit includes a circuit composed of the seventh resistor (R7), the eighth resistor (R8), and the ninth resistor (R9), and its specific connection method is as follows:

[0104] The input signal flows through the seventh resistor (R7), the eighth resistor (R8), and the ninth resistor (R9) connected in series to the ground;

[0105] The first voltage sampling point is formed at the junction of the seventh resistor (R7) and the eighth resistor (R8), and is output to the sampling hysteresis circuit;

[0106] A second voltage sampling point is formed at the junction of the eighth resistor (R8) and the ninth resistor (R9), and is output to the positive input terminal of the comparator through the eleventh resistor (R11).

[0107] The difference between the two sampling signals is R8 / (R7+R8+R9) times of the input voltage, which changes with the input voltage...

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Abstract

The invention relates to a voltage signal demodulation circuit. The voltage signal demodulation circuit comprises a proportional sampling circuit, a sampling delay circuit, a comparator circuit and a proportional feedback circuit. One end of the proportional sampling circuit is connected with an input bus, and the other end of the proportional sampling circuit is connected with one input end of a comparator and the sampling delay circuit respectively. One end of the sampling delay circuit is connected with the proportional sampling circuit, and the other end of the sampling delay circuit is connected with the other input end of the comparator. The input ends of the comparator are connected with the proportional sampling circuit and the sampling delay circuit respectively. The output end of the comparator and an output bus are connected with the proportional feedback circuit respectively. One end of the proportional feedback circuit is connected with the output end of the comparator, and the other end of the proportional feedback circuit is connected with the two input ends of the comparator respectively. The voltage signal demodulation circuit has the advantages that by using a proportional sampling method and a proportional feedback method, signal identification amplitude changes along with changes of input voltage; the voltage signal demodulation circuit can dynamically adapt to voltage loss caused by distributed resistance and can reliably work under the condition of large distributed resistance, so the requirements for circuits are lowered, and the voltage signal demodulation circuit can adapt to a wider working voltage range.

Description

technical field [0001] The invention relates to a slave station demodulation circuit, in particular to a voltage signal demodulation circuit. Background technique [0002] In the bus structure where power supply and digital signal share the line, the master station sends signals to the slave stations through voltage modulation. The normal line voltage indicates signal 1, and a certain amplitude lower than the normal voltage indicates signal 0. In the bus with a longer wiring distance, due to the influence of distributed resistance, the closer to the master station, the higher the working voltage obtained by the slave station from the bus, and the larger the modulation voltage amplitude obtained; the farther away from the master station, the higher the working voltage obtained by the slave station The lower the operating voltage, the obtained modulation voltage amplitude is proportionally reduced. For example: if the bus voltage of the master station is 36V, the signal modul...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05F1/56
Inventor 邓旭东
Owner 云南卓烁科技有限公司