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Flash memory device and data reading method thereof

A data reading and memory technology, applied in static memory, read-only memory, information storage, etc., can solve the problems affecting the correctness of interpreting the data content of memory cells, the speed of data reading, and the current size limit, so as to improve the accuracy The effect of improving the discharge capacity, improving the speed of data reading

Active Publication Date: 2015-08-12
WINBOND ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

When most of the data stored in the memory cells in the page group is "1", the current flowing out of the page group may exceed the maximum discharge current that the source discharge transistor can achieve, which will make the page group The size of the current flowing out of the memory cells in the memory cell is limited, which in turn affects the accuracy of reading the data stored in the memory cells and the speed of data reading

Method used

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  • Flash memory device and data reading method thereof
  • Flash memory device and data reading method thereof
  • Flash memory device and data reading method thereof

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Embodiment Construction

[0039] figure 1 For a schematic diagram of a flash memory device according to an embodiment of the present invention, please refer to figure 1 . The flash memory device includes a memory unit 102 , a source discharge transistor M1 , a precharge unit 104 , a boost unit 106 and a control unit 108 . Wherein the memory unit 102 can be, for example, a parallel flash memory (parallel flash memory), but it is not limited thereto. The memory unit 102 may include a plurality of memory cells (not shown), and the sources of the plurality of memory cells may be connected to the drain of the source discharge transistor M1, such as the sources of the plurality of memory cells in the same page group. The poles may be commonly connected to the drain of the source discharge transistor M1. The source of the source discharge transistor M1 is coupled to the ground, and the gate of the source discharge transistor M1 is coupled to the pre-charge unit 104 and the boost unit 106 . In addition, th...

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Abstract

The invention discloses a flash memory device and a data reading method thereof. During data reading of a memory unit, boosting voltage with a voltage value higher than the value of pre-charging voltage is supplied to a source discharge transistor so as to improve the discharge capability of the source discharge transistor.

Description

technical field [0001] The present invention relates to a memory device, and in particular to a flash memory device and a data reading method thereof. Background technique [0002] In a typical FLASH memory array, memory cells are arranged in a rectangular array formed by columns and rows, and memory cell transistors are arranged at intersections formed by the columns and rows. The drain of each transistor is connected to the corresponding bit line, the source is connected to the drain of the array source discharge transistor via the array source line, and the gate is connected to the word line. [0003] Flash memory allows programming, reading, or erasing in blocks, sectors, or pages. Generally speaking, memory cells have metal-oxide-semiconductor (MOS) Structure, when there is no charge stored in the floating gate of the memory cell, that is, when the write data is "1", the memory cell is normally on when reading. When there are stored electrons in the floating gate, tha...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/26
Inventor 叶润林张尚文
Owner WINBOND ELECTRONICS CORP