Latency sensitive software interrupt and thread scheduling
A technology of software interrupts and waiting times, applied in the field of computers, to solve problems such as failures, time sensitivity, and poor performance of computing equipment
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[0015] Various embodiments provide the ability to schedule latency sensitive tasks based at least in part on processor core usage metrics. One or more processor cores associated with a given system may be configured to identify when a particular processor core usage has exceeded a certain threshold, when the processor core is busy handling interrupts, and the like. Alternatively or additionally, these metrics may be collected and / or updated periodically to identify times in a given system when processor cores are more heavily loaded than other cores, and / or processor core resources are relatively free to available time. Before assigning tasks to processor cores, such as dispatching software interrupts and / or scheduling latency-sensitive threads to specific processors for processing, these metrics can be analyzed to determine which processor core currently has more resources available for this task. In turn, the task can be efficiently completed by runnin...
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