Method for double control cache synchronous design based on SCST
A design method and caching technology, applied in the direction of input/output to the record carrier, etc., can solve the problem of single point failure of a single storage controller, affecting the reliable storage of data, etc., achieving easy promotion, meeting throughput requirements, and strong practicability Effect
Active Publication Date: 2015-09-16
SHANDONG CHAOYUE DATA CONTROL ELECTRONICS CO LTD
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However, a single storage controller has a single point of failure, which affects the reliable storage of data
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[0040] A SCST-based dual-control buffer synchronization design method provided by the present invention will be described in detail below in conjunction with the accompanying drawings.
[0041] The present invention proposes a SCST-based dual-control cache synchronization design method. The module needs to be combined with the SCST to realize block data cache synchronization. The present invention will be used in storage controllers, and the scheme needs to design a synchronization mechanism and a synchronization algorithm to maintain data consistency between two controllers. The solution includes two modules, the cache pool module Mempool and the synchronization module Syc Module, which mainly design the transfer data structure, synchronization algorithm and synchronization strategy.
[0042] as attached figure 1 As shown, the method is implemented through the following steps:
[0043] Connect the client computer to two identical storage controllers A and B, set SCST cache ...
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The invention provides a method for double control cache synchronous design based on an SCST. The concrete implementation process of the method is that a client is connected to two identical memory controllers A and B; SCST cache regions, cache pool modules and synchronous modules are positioned in the two memory controllers, and the two memory controllers are connected with a disk array; when client data are input to one memory controller, data in the memory controller undergo backup to the other memory controller, the cache synchronization in the two memory controllers is achieved; and then the data in the memory controller are written in the disk array. Compared with the prior art, the method for double control cache synchronous design based on the SCST can achieve backup storage of the data of the memory controller, cache data can achieve synchronization of multiple physical transmission mediums, the throughput requirements of a mass array storage system are met, and the method is high in practicality and easy to popularize.
Description
technical field [0001] The invention relates to the technical field of computer server storage, in particular to an SCST-based dual-control buffer synchronization design method. Background technique [0002] With the rapid development of computer technology and network technology, the reliability of data storage has gradually been paid attention to. The current storage methods mostly use relatively expensive disks to form a large-capacity disk group. With the design of scattered data arrangement, the data is divided into different sections and stored separately, thus forming a disk array. In this way, the reliability bottleneck of the system is the disk array controller. The current method can use multi-channel disk array controllers to share the disk array, which can not only increase the reliability of the array system, but also store data externally through the multi-channel controller. services, improving storage efficiency. [0003] At present, in the SCST-based netwo...
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IPC IPC(8): G06F3/06
Inventor 张凡凡吴登勇李保来
Owner SHANDONG CHAOYUE DATA CONTROL ELECTRONICS CO LTD