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Manufacturing method for FFS array substrate

A manufacturing method and array substrate technology, applied in semiconductor/solid-state device manufacturing, optics, instruments, etc., can solve the problems of low electron mobility, large leakage current, and poor light stability of amorphous silicon, and achieve light stability and light stability. Good permeability, high electron mobility and aperture ratio, and the effect of reducing the number of photomasks

Inactive Publication Date: 2015-11-18
TCL CHINA STAR OPTOELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] At present, amorphous silicon (a-Si) and polycrystalline silicon (p-Si) are the mainstream semiconductor materials for thin film transistors (ThinFilmTransistor, TFT), among which amorphous silicon is the most widely used, but amorphous silicon has low electron mobility and light stability. gender issues
Although polycrystalline silicon is better than amorphous silicon in terms of electron mobility, it has problems such as complex structure, large leakage current, and poor film quality uniformity.
In general, with the rapid development of display technology, people have put forward higher and higher requirements for the performance of TFT, and amorphous silicon and polysilicon can no longer fully meet these requirements.
[0004] In addition, the pixel electrodes are generally made of transparent Indium Tin Oxide (ITO) material. When manufacturing the semiconductor active layer of the TFT and the pixel electrode, two mask processes are required to separately manufacture the semiconductor active layer of the TFT. Source layer and pixel electrode, this will require more photomasks and more complex manufacturing processes, reducing production efficiency

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  • Manufacturing method for FFS array substrate
  • Manufacturing method for FFS array substrate
  • Manufacturing method for FFS array substrate

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Embodiment 1

[0038] Such as figure 1 Shown is a flowchart of a method for manufacturing an FFS array substrate in this embodiment, Figure 2 to Figure 8 Sequence diagram for fabricating the FFS array substrate for this embodiment.

[0039] From figure 1 It can be seen that a method for manufacturing an FFS array substrate in this embodiment includes the following steps:

[0040] S101: if figure 2 As shown, a gate 3 and a common electrode 2 are formed on a glass substrate 1 , and the gate 3 is formed on a part of the common electrode 2 . The specific manufacturing process is as follows: now a layer of ITO is deposited on the glass substrate 1, and then a metal layer is deposited on the ITO layer. The material of the metal layer can be copper or aluminum, or other metals. Then, the ITO layer and the metal layer are patterned once more, that is, through a photomask process, including photoresist coating, exposure, development, etching, and photoresist removal, to form the gate electrode....

Embodiment 2

[0049] The front part of this embodiment is the same as S101-S105 of Embodiment 1, the difference is that after S105, before forming the source electrode 10 and the drain electrode 11 on the semiconductor active layer 8, a step is further included: An etching stopper layer 13 is formed on the semiconductor active layer 8 and the pixel electrode 9 , and in this embodiment, the etching stopper layer 13 is preferably made of silicon oxide. In addition, via holes are formed on both ends of the semiconductor active layer 8 and on the corresponding etching barrier layer 13 on one end of the pixel electrode 9 close to the semiconductor active layer 8, so that the semiconductor active Two ends of the layer 8 and one end of the pixel electrode 9 close to the semiconductor active layer 8 are exposed to prepare for the next step of forming the source electrode 10 and the drain electrode 11 .

[0050] Next, the source electrode 10 and the drain electrode 11 are formed on the etching barri...

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Abstract

The invention provides a manufacturing method for an FFS array substrate. The manufacturing method includes the following steps that a grid electrode and a common electrode are formed on a glass substrate, and the grid electrode is formed on the upper face of part of the common electrode; a grid electrode insulation layer is formed on the grid electrode and the common electrode; a transparent metal-oxide semiconductor layer is deposited on the grid electrode insulation layer, one time of patterning processing is conducted on the transparent metal-oxide semiconductor layer, and a semiconductor active layer precursor and a pixel electrode precursor are formed; ion implantation processing is conducted on the two ends, without the reservation of light resistance layers, of the semiconductor active layer precursor and the pixel electrode precursor, and transparent conductors can be formed by the semiconductor active layer precursor and the pixel electrode precursor; finally, a source electrode and a drain electrode are formed on a semiconductor active layer. According to the manufacturing method, the photomask times needed in manufacturing of the FFS array substrate can be reduced, and the manufacturing efficiency of the FFS array substrate is improved.

Description

【Technical field】 [0001] The invention relates to the technical field of liquid crystal displays, in particular to a method for manufacturing an FFS array substrate. 【Background technique】 [0002] Fringe Field Switching (FFS for short) technology is a current liquid crystal display technology and a wide viewing angle technology developed by the liquid crystal industry to solve large-size, high-definition desktop monitors and LCD TV applications. FFS LCD panel has the advantages of fast response time, high light transmittance, wide viewing angle and low color shift. [0003] At present, amorphous silicon (a-Si) and polycrystalline silicon (p-Si) are the mainstream semiconductor materials for thin film transistors (ThinFilmTransistor, TFT), among which amorphous silicon is the most widely used, but amorphous silicon has low electron mobility and light stability. gender issues. Although polycrystalline silicon is better than amorphous silicon in terms of electron mobility, i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G02F1/1343G02F1/1333G02F1/1362
CPCG02F1/1333G02F1/134363G02F1/1362G02F1/134372H01L27/124G02F1/13439G02F2202/10H01L27/1225H01L27/127H01L27/1288H01L29/4908H01L29/7869G02F1/136231G02F1/1368H01L21/426
Inventor 葛世民
Owner TCL CHINA STAR OPTOELECTRONICS TECH CO LTD