Semiconductor device and formation method thereof
A semiconductor and device technology, applied in the field of semiconductor devices and their formation, can solve problems such as performance improvement, achieve performance improvement, reduce parasitic capacitance, and reduce parasitic capacitance.
Active Publication Date: 2015-11-25
SEMICON MFG INT (SHANGHAI) CORP
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Problems solved by technology
[0006] However, the performance of FinFETs with stressed layers still needs to be improved
Method used
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[0034] As mentioned in the background, the performance of the FinFET with the stress layer still needs to be improved.
[0035] In FinFETs, such as figure 1 As shown, the gate structure 103 includes: a gate dielectric layer located on the top and sidewall surfaces of the fin portion 101, a gate layer located on the surface of the gate dielectric layer, and sidewalls located on the gate dielectric layer and the sidewall surfaces of the gate layer . The sidewalls and top of the fin 101 covered by the gate structure 103 can form a channel region.
[0036] When the stress layer is formed in the FinFET, the stress layer is formed on the surface of the fin portion 101 on both sides of the gate structure 103 . In order for the stress layer to provide sufficient stress to the channel region, the formed stress layer needs to have a sufficient thickness, resulting in a larger thickness of the stress layer located on the top and sidewall surfaces of the fin portion 101, so that the gat...
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The present invention relates to a semiconductor device and a formation method thereof, wherein the formation method of the semiconductor device comprises the steps of providing a substrate, wherein a fin part is arranged on the surface of the substrate, a dielectric layer covering a part of side wall of the fin part is arranged on the surface of the substrate, the surface of the dielectric layer is lower than the top surface of the fin part, and the side wall and the top surface of the fin part and the surface of the dielectric layer are equipped with a grid structure spanning the fin part; forming grooves in the fin part at the two sides of the grid structure, wherein the bottoms of the grooves are lower than the surface of the dielectric layer; by taking the grid structure as a mask, etching the dielectric layer to enable the thickness of the dielectric layer to be reduced by a preset size; after the grooves are formed and the dielectric layer is etched, adopting an epitaxial deposition technology to form the stress layers on the surface of the fin part at the bottoms of the grooves and the surface of the dielectric layer. The performance of the formed semiconductor device is improved.
Description
technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor device and a forming method thereof. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. As the most basic semiconductor device, transistors are currently being widely used. Therefore, with the increase of component density and integration of semiconductor devices, the gate size of planar transistors is getting shorter and shorter. The ability of traditional planar transistors to control channel current Weakened, resulting in short channel effect, resulting in leakage current, and ultimately affecting the electrical performance of semiconductor devices. [0003] In order to overcome the short-channel effect of the transistor and suppress the leakage current, a Fin Field Effect Transistor (FinFET) is propos...
Claims
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IPC IPC(8): H01L21/336H01L29/78H01L29/06H01L29/423
Inventor 洪中山
Owner SEMICON MFG INT (SHANGHAI) CORP