Making method of film transistor and array substrate, array substrate and display device
A technology of thin film transistors and array substrates, applied in the direction of transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of increasing process steps and costs, adding a mask, manufacturing process complexity and difficulty, etc.
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Embodiment 1
[0041] This embodiment provides a method for manufacturing a thin film transistor. Figure 1 to Figure 9 A flow chart of a manufacturing process of a thin film transistor provided in this embodiment.
[0042] Such as figure 1 As shown, a gate 102 is formed on a base substrate 101 . The step of forming the gate may include, for example, forming a gate film, and patterning the gate film to form the gate. For example, the base substrate 101 may be a glass substrate, a quartz substrate, or other substrates. For example, the material of the gate 102 includes one or more selected from titanium, tantalum, chromium, aluminum, aluminum alloy, copper, copper alloy, molybdenum, and molybdenum-aluminum alloy. For example, the gate 102 can be a single-layer or multi-layer structure. A gate insulating layer 103 is formed on the substrate 101 on which the gate 102 is formed. For example, the gate insulating layer may be formed using a chemical vapor deposition method, but is not limite...
Embodiment 2
[0059] This embodiment provides a method for manufacturing an array substrate, which includes the method for manufacturing a thin film transistor described in any one of the above embodiments. The preparation method of the thin film transistor is the same, and will not be repeated here. It is also formed by forming the photoresist pattern in the process step of forming the active layer 104 into the first photoresist pattern 111 with different thicknesses, and through the ashing process, the first photoresist pattern 111 is used as After etching the active layer 104 with the mask, remove part of the photoresist (ash the photoresist with the second thickness and thin the photoresist with the first thickness), but keep the channel region 107 to be formed in the corresponding active layer 104 region of the photoresist to obtain a second photoresist pattern 112 . Thus, the first photoresist pattern 111 can function as a mask for forming the active layer 104, and the second photore...
Embodiment 3
[0065] This embodiment provides an array substrate, such as Figure 11 As shown, it includes a base substrate 101, a gate 102 disposed on the base substrate 101, a gate insulating layer 103 disposed on the gate 102, and an active layer disposed on the gate insulating layer 103. 104, the source electrode 105 and the drain electrode 106 arranged on both sides of the active layer 104 and electrically connected to the active layer are arranged on the source electrode 105, the active layer 104, the drain electrode 106 and the gate insulating layer 103 The passivation layer 108 and the pixel electrode 109 disposed on the passivation layer 108 .
[0066] For example, the base substrate 101 may be a glass substrate, a quartz substrate, or other substrates.
[0067] For example, the material of the gate 102 includes one or more selected from titanium, tantalum, chromium, aluminum, aluminum alloy, copper, copper alloy, molybdenum, and molybdenum-aluminum alloy.
[0068] For example, t...
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