A power module structure capable of improving welding quality

Abstract

The invention provides a power module structure capable of improving welding quality. The power module structure comprises a bottom board, DBC substrates and power chips. The upper surface and the lower surface of each DBC substrate are covered with an upper copper layer and a lower copper layer respectively. The power chips are welded to the upper copper layers through second solder layers. The lower copper layers are welded to the bottom board through first solder layers. The power chips and the upper copper layers are bonded via leads. The upper surface of the bottom board is provided with etched first grooves with chamfers, which match the first solder layers. The first solder layers are applied in the first grooves. The upper surfaces of the upper copper layers are provided with etched second grooves with chamfers, which match the second solder layers. The second solder layers are applied in the second grooves. The structure can prevent unevenness of the thickness of the solder layers and overflow of solder, reduce cavities of the solder layers, and further improve the welding quality of the power module and improve the thermal property and the long-term reliability of the power module.

Description

technical field [0001] The invention belongs to the technical field of semiconductor chip packaging, in particular to a power module structure that can improve welding quality. Background technique [0002] At present, the interconnection process of power modules at home and abroad mainly adopts welding method, see figure 1 . In this packaging structure, the power chip 7 is reflow soldered to the upper copper layer 5 of the DBC substrate (copper-clad ceramic substrate) 4 through the first solder layer 6, and the DBC substrate 4 after welding the power chip is then reflowed through the second solder layer 2 Soldering on the base plate 1; or two reflow soldering processes are completed simultaneously. The DBC substrate is usually a sandwich structure, such as figure 1 Among them, its upper and lower surfaces are respectively covered with an upper copper layer 5 and a lower copper layer 3; the bottom plate 1 is usually made of high thermal and electrical conductivity materia...

AI Technical Summary

Problems solved by technology

Due to process limitations, this process is prone to problems such as uneven solder coating thickness and component mounting tilt, which in turn will cause tilt or offset of the DBC substrate and power chip during the reflow soldering process. See figure 2

In addition, the uneven thickness of the first solder layer 6 and the second solder layer 2 will increase the stress suffered by the power chip by 2.2 times during the power cycle and temperature cycle [1] , the creep strain in the solder layer increases significantly [2] , affecting the long-term ser

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