Method for forming semiconductor structure

A semiconductor and gate structure technology, applied in the field of semiconductor structure formation, can solve the problems of poor nanowire morphology, decreased yield, poor performance of nanowire transistors, etc., achieves good morphology, improved performance, and prevents tip discharge. effect of effect

Active Publication Date: 2016-03-02
SEMICON MFG INT (SHANGHAI) CORP
View PDF3 Cites 8 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, the nanowires formed by the prior art have poor morphology, resulting in poor performance and reduced yield of the formed nanowire transistors

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for forming semiconductor structure
  • Method for forming semiconductor structure
  • Method for forming semiconductor structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0033] As mentioned in the background art, the nanowires formed in the prior art have poor morphology, resulting in poor performance and reduced yield of the formed nanowire transistors.

[0034] After research, it was found that because the nanowires perpendicular to the substrate surface are easily deformed and bent after annealing, the morphology of the nanowires is poor, and even the problem of bridging adjacent nanowires occurs, which in turn makes the formed nanowire transistors good. rate drops.

[0035] For details, please refer to figure 1 , figure 1 It is a schematic diagram of a cross-sectional structure of nanowires after thermal annealing, including: a substrate 100 ; an opening 101 inside the substrate 100 ; and several nanowires 102 on the bottom surface of the opening 101 .

[0036] Since the nanowire 102 is in a semi-molten state during the thermal annealing process, the atoms in the nanowire 102 can move to positions with lower free energy, so that the corn...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides a method for forming a semiconductor structure. The method comprises a step of providing a substrate, a step of etching the substrate, forming an opening in the substrate and a plurality of nanowires at the bottom surface of the opening, wherein the nanowires are perpendicular to the surface of the substrate, a step of forming a sacrificial layer in the opening, a step of forming a second mask layer at the surface of the sacrificial layer and the top of the nanowires, wherein the second mask layer covers the nanowires and exposes partial surface of the sacrificial layer, a step of removing the sacrificial layer after the second mask layer is formed, and a step of carrying out annealing on the nanowires after the sacrificial layer is removed. The morphology of the formed semiconductor structure is good.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. Transistors, as the most basic semiconductor devices, are currently being widely used. Therefore, as the component density and integration of semiconductor devices increase, the gate size of transistors is also getting shorter and shorter. However, the shortening of the gate size of the transistor will cause the short-channel effect of the transistor, thereby generating leakage current, and ultimately affecting the electrical performance of the semiconductor device. [0003] In order to overcome the short channel effect of the transistor and suppress the leakage current, the prior art proposes a nanowire (Nanowire) transist...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L21/336H01L21/28
Inventor 洪中山
Owner SEMICON MFG INT (SHANGHAI) CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap