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A bit synchronization method and device
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A technology of bit synchronization and valley value, applied in the field of bit synchronization method and device, can solve problems such as complex structure, achieve the effects of small calculation amount, simple structure, and improved efficiency and precision
Active Publication Date: 2018-10-26
TIANJIN WEISHENGWEI TECH CO LTD
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The phase-locked loop method, taking the digital phase-locked method as an example, its structure includes a high-stability oscillator (crystal oscillator), a frequency divider, a phase comparator and a control circuit, and the structure is relatively complicated
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Embodiment 1
[0084] Such as figure 1 As shown, in the bit synchronization method of the present invention, for example, the preamble of the designed communication system is a sequence {101010...10} with a length of 20 bits, and the sampling rate is 16 times of the code rate.
[0085] It includes the following steps:
[0086] Step S100, when performing bit synchronization, use the preamble sequence to perform multi-symbol accumulation signal processing on sampling points within an even multiple of the symbol length in the demodulated oversampled signal to obtain single accumulation data;
[0087] Taking the preset symbol timing position as the starting point, select 64 continuous leading data sampling points as the input of the multi-symbol signal accumulator.
[0088] The accumulator accumulates, for example, 32 sampling points within 2 times the symbol length at 2-bit length intervals, and each sampling point is accumulated twice, and each group of data can be accumulated to obtain accum...
Embodiment 2
[0103] Such as figure 1 As shown, in the bit synchronization method of the present invention, for example, the preamble of the designed communication system is a sequence {101010...10} with a length of 20 bits, and the sampling rate is 16 times of the code rate.
[0104] It includes the following steps:
[0105]Step S100, when performing bit synchronization, use the preamble sequence to perform multi-symbol accumulation signal processing on sampling points within an even multiple of the symbol length in the demodulated oversampled signal to obtain single accumulation data;
[0106] Taking the preset symbol timing position as the starting point, select 64 continuous leading data sampling points as the input of the multi-symbol signal accumulator.
[0107] The accumulator accumulates the 64 sampling points within 4 times the symbol length at intervals of 2 bits, and accumulates each sampling point twice, so that 32 points of accumulated data can be obtained after each group of ...
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Abstract
The invention discloses a bit synchronization method and device. The bit synchronization method comprises following steps: when carrying out bit synchronization, carrying out multi-symbol signal accumulation, searching a peak, a valley value and corresponding positions, carrying out loop filtering and updating a timing position by using a preset preamble sequence, and then repeating the four steps by means of the updated timing position until the preamble is ended; wherein the preamble sequence is set to a {101010... 10} or 010101... 01} sequence. The bit synchronization method disclosed by the invention is used for timing and calculating by use of the preset data of the preamble, so that the method is simple, the calculated amount is small, and the timing efficiency and precision are improved. Corresponding to the method, the invention further provides a bit synchronization device.
Description
technical field [0001] The present invention relates to a bit synchronization method and device, in particular to a bit synchronization method and device based on a preamble with more precise timing and higher efficiency. Background technique [0002] In communication systems such as FSK (Frequency-shift keying, frequency-shift keying) or OOK (On-Off Keying, binary on-off keying) systems, it is often necessary to recover the clock of the transmitted signal from the demodulated signal, and find The optimal moment to send a bit decision is known as bit synchronization. When the decision time is determined, a decision is made on the corresponding demodulated signal, and the transmitted information bits are recovered. The accuracy of bit synchronization directly affects the performance of the receiver. [0003] Commonly used methods for realizing bit synchronization include inserting pilot method and direct method. The insertionpilot method is to insert the required bit timi...
Claims
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