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How the transistor is formed

A transistor, dry etching technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems that the electrical properties of transistors need to be improved, the transistor formation process is difficult to control, etc., to achieve good appearance, improve electrical performance effect

Active Publication Date: 2019-12-31
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Although the introduction of a high-k metal gate can reduce the leakage current of the transistor to a certain extent, the electrical performance of the transistor formed by the prior art still needs to be improved due to the difficulty in controlling the formation process of the transistor.

Method used

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  • How the transistor is formed
  • How the transistor is formed
  • How the transistor is formed

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Embodiment Construction

[0036] It is known from the background technology that the performance of transistors formed in the prior art needs to be improved.

[0037] The method for forming the transistor is studied. In one embodiment, taking the transistor to be formed as a CMOS transistor as an example, the method for forming the transistor includes the following steps:

[0038] Such as figure 1 As shown, a substrate 100 is provided. The substrate 100 includes a first region 10 and a second region 20. A first dummy gate structure is formed on the surface of the substrate 100 in the first region 10, and the first dummy gate structure includes: A gate dielectric layer 111 and a first dummy gate 112 on the surface of the first gate dielectric layer 111, a second dummy gate structure is formed on the surface of the substrate 100 in the second region 20, and the second dummy gate structure includes: A gate dielectric layer 121 and a second dummy gate 122 located on the surface of the second gate dielectric la...

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Abstract

A method for forming a transistor includes: providing a substrate having a dummy gate on the substrate; forming an interlayer dielectric layer covering a surface of the substrate and a surface of a sidewall of the dummy gate; A surface; forming a mask layer on the surface of the interlayer dielectric layer, and the mask layer exposing the top surface of the dummy gate; using the mask layer as a mask to remove the dummy gate by etching, and forming the mask layer A groove, and a root defect is formed on a surface of a bottom wall of the groove; and the root defect is removed by etching using a dry etching process. After the dummy gate is removed, the present invention uses a dry etching process to remove root defects, thereby improving the shape of the subsequent gate formed in the groove and optimizing the electrical performance of the formed transistor.

Description

Technical field [0001] The present invention relates to the field of semiconductor manufacturing technology, in particular to a method for forming a transistor. Background technique [0002] The main semiconductor devices of integrated circuits, especially VLSIs, are metal-oxide-semiconductor field effect transistors (MOS transistors). With the continuous development of integrated circuit manufacturing technology, the technology nodes of semiconductor devices continue to decrease, and the geometric size of transistors continues to shrink in accordance with Moore's Law. When the size of the transistor is reduced to a certain extent, various secondary effects brought about by the physical limit of the transistor appear one after another, and it becomes more and more difficult to scale down the feature size of the transistor. Among them, in the field of transistor and semiconductor manufacturing, the most challenging is how to solve the problem of large leakage current of the trans...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336
CPCH01L21/823437H01L21/823828H01L29/66636H01L29/7848H01L29/165H01L21/32137H01L29/66545H01L29/517H01L29/495H01L29/4966H01L29/401
Inventor 张海洋张璇
Owner SEMICON MFG INT (SHANGHAI) CORP