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Gate driving circuit

A technology of gate drive circuit and polarity, which is applied in static memory, instrument, static indicator, etc., can solve the problem that the scanning signal cannot maintain low potential, and achieve the effect of improving stability

Active Publication Date: 2016-06-01
SHENZHEN CHINA STAR OPTOELECTRONICS TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

During the period when the clock signal does not generate pulses, the pull-down maintenance module will not function, so that the scanning signal at the output terminal cannot maintain a low potential

Method used

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Embodiment Construction

[0023] see figure 1 , figure 1 It is a functional block diagram of the liquid crystal display 10 of the present invention. The LCD 10 includes a glass substrate 14 , a timing controller 30 and a source driver 16 . A plurality of pixels and a gate driver (GOA) circuit 12 arranged in a matrix are arranged on the glass substrate 14 , and each pixel includes three pixel units 20 respectively representing three primary colors of red, green and blue (RGB). The timing controller 30 is used to generate clock signals CK1-CK2 and a start signal STV. The GOA circuit 12 outputs scan signals at regular intervals so that the transistors 22 in each row are sequentially turned on, and at the same time the source driver 16 outputs corresponding data signals to a whole column of pixel units 20 to charge them to their respective required voltages, so that Displays different gray scales. After the same row is fully charged, the GOA circuit 12 turns off the scanning signal of the row, and then...

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Abstract

A gate driving circuit comprises a plurality of GOA (Gate driver on array) circuit units. The GOA circuit unit at each stage comprises a pull-down maintenance module for maintaining the level of a second control node during a non scanning period to maintain the low level of a scanning signal. According to the pull-down maintenance module of the GOA circuit unit, a first transistor and a second transistor are used for matching designs of a first clock signal and a second clock signal, during a period during which the scanning signal does not need to output pulses, the pull-down maintenance module can still continuously output a signal to start the pull-down module. Thus, during the period during which the scanning signal does not need to output pulses, the scanning signal can still be pulled down to the low level under effects of the started pull-down module. The technical problem that the pull-down maintenance module in the prior art cannot operate continuously can be solved, and beneficial effects of enhancing the stability of the scanning signal outputted by the GOA circuit unit are realized.

Description

technical field [0001] The invention relates to the field of a liquid crystal display, in particular to a liquid crystal display using a gate driver (Gated driver on array, GOA) circuit. Background technique [0002] The GOA circuit uses the thin film transistor liquid crystal display Array process to manufacture the gate driver on the substrate with the thin film transistor (Thinfilm transistor, TFT) array, so as to realize the driving mode of progressive scanning. [0003] The GOA circuit includes several GOA circuit units. A traditional GOA circuit unit outputs scan signals by controlling the gate voltage of the output transistor (ie, the voltage at point Q). The traditional GOA circuit unit uses the clock signal as the input source of the pull-down hold module, so the pull-down hold module will only work when the clock signal generates pulses. When the clock signal does not generate a pulse, the pull-down sustain module will not function, so that the scanning signal at...

Claims

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Application Information

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IPC IPC(8): G09G3/36
CPCG09G3/3677G09G3/3648G09G2230/00G09G2300/0408G09G2310/0251G09G2310/0286G11C19/28G09G2290/00G09G2310/0264
Inventor 石龙强
Owner SHENZHEN CHINA STAR OPTOELECTRONICS TECH CO LTD
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