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Semiconductor substrate, semiconductor packaging structure and manufacturing method thereof

A semiconductor and substrate technology, applied in the field of semiconductor substrates, can solve problems such as interference, small contact area, via hole not in contact with the mask, etc.

Active Publication Date: 2016-06-29
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, errors generated in the semiconductor process may cause some via holes not to be in contact with the mask, or the contact area is too small, thereby affecting the effect of shielding electromagnetic interference

Method used

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  • Semiconductor substrate, semiconductor packaging structure and manufacturing method thereof
  • Semiconductor substrate, semiconductor packaging structure and manufacturing method thereof
  • Semiconductor substrate, semiconductor packaging structure and manufacturing method thereof

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Embodiment Construction

[0013] figure 1 is a schematic diagram of a semiconductor substrate according to an embodiment of the present disclosure. refer to figure 1 The semiconductor substrate 10 may include a first surface 101 , a second surface 102 , a third surface 103 , a first conductive portion 104 , a second conductive portion 105 and a non-conductive portion 106 .

[0014] The semiconductor substrate 10 may be composed of materials known to those skilled in the art as the semiconductor substrate 10 . For example, semiconductor substrate 10 may be or may include, for example, an organic substrate (FR4, FR5), glass, quartz, silicon dioxide, or other suitable material.

[0015] The semiconductor substrate 10 may be but not limited to a cuboid, and its geometric shape may be changed according to design requirements. For example, the first surface 101 and the second surface 102 may be rectangles having substantially the same area. The first surface 101 may be the upper surface 101 of the semico...

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PUM

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Abstract

The invention relates to a semiconductor substrate, a semiconductor packaging structure and a manufacturing method thereof. The semiconductor substrate comprises a first surface, a second surface, a third surface, a first conductive part and a second conductive part. The second surface is opposite to the first surface. The third surface extends from the first surface to the second surface. The first conductive part has a first width on the third surface, and has a first area on the first surface. The second conductive part has a second width on the third surface, and has a second area on the first surface, wherein the second width is different from the first width and the second area is different from the first area.

Description

technical field [0001] The invention relates to a semiconductor substrate, a semiconductor packaging structure and a manufacturing method thereof. Background technique [0002] The structure of semiconductor devices is becoming more and more complex in response to the demand for product size reduction and faster processing speed. In addition, electronic products including semiconductor devices also face the need for further miniaturization. Semiconductor devices are generally mounted on a system substrate with circuitry, such as a circuit board, after being packaged. [0003] A communication module may be included in the semiconductor device. The communication module may contain an antenna to receive or transmit signals. Since the antenna signal is a high-frequency signal, it is easy to generate electromagnetic interference (electromagnetic interference, EMI) on the circuit of the system substrate. In order to reduce the influence of electromagnetic interference, a mask ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/13H01L23/31H01L21/58
CPCH01L2224/16225H01L2224/97H01L2924/181H01L2924/19105H01L2924/00012
Inventor 姜裕求金政勋林星默
Owner ADVANCED SEMICON ENG INC