Semiconductor device and manufacturing method thereof

Abstract

The invention discloses a semiconductor device and a manufacturing method thereof. The semiconductor device comprises a gate metal layer, a first interlayer dielectric layer, a bottom mask layer, a top mask layer, and a second interlayer dielectric layer. The first interlayer dielectric layer surrounds the periphery of the gate metal layer. The bottom mask layer is arranged on the gate metal layer. The mark layers and the gate metal layer include at least one identical metal atom. The top mask layer is arranged on the surface of the bottom mask layer in an orthodromic manner. The second interlayer dielectric layer is arranged on the top mask layer, and directly contacts the first interlayer dielectric layer.

Description

technical field [0001] The present invention relates to the field of semiconductor devices, in particular to a semiconductor device with a raised source / drain and a metal gate and a manufacturing method thereof. Background technique [0002] As the integration of integrated circuits (ICs) continues to increase, the feature sizes of semiconductor elements in integrated circuits continue to shrink. In order to cope with various electrical or manufacturing process limitations caused by the scaling of semiconductor devices, the industry has also proposed various solutions. For example, for transistor devices, in order to solve the problems of boron penetration and depletion effect caused by the traditional polysilicon gate, the industry currently adopts a gate-last manufacturing process to have a metal electrode. Metal gates replace traditional polysilicon gates. In addition, as the distance between each gate structure shrinks gradually, the industry also correspondingly propo...

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Problems solved by technology

It is known that the height of the final metal gate is closely related to the electrical properties of the transistor device. In order to maintain the height of the final metal gate within a predetermined value, the manufacturer will correspondingly increase the height of the initial dummy gate. However, an excessively high dummy gate will cause many manufacturing process problems, such as: the dummy gate is easy to break in the grinding process, the dummy gate is prone to shadowing effect in the ion implantation process, The dielectric layer is not easy to fill between the dummy gates and the metal layer is not easy to fill in the gate trenches.

In addition, due to the planarization process in the process of forming the mask layer, some of the mask layer with a larger size may be dished.

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