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A New Method of Suppressing Carrier Synchronization and Costas Loop

A carrier wave suppression and bit synchronization technology, applied in the modulation carrier system, digital transmission system, electrical components, etc., can solve the problems of difficult control of precision, many modules involved, and large amount of resources, so as to increase the synchronization range, realize simple structure, The effect of less resource consumption

Active Publication Date: 2020-06-23
ZTE INTELLIGENT IOT TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method involves a large amount of engineering, involves many modules, and takes up a large amount of resources when implemented by programmable devices, and the accuracy is not easy to control, and it has certain limitations when the input signal is short and the frequency of the bit synchronization clock is high.

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  • A New Method of Suppressing Carrier Synchronization and Costas Loop

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Embodiment Construction

[0015] It should be noted that, in the case of no conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0016] The present invention will be described in detail below in conjunction with embodiments and accompanying drawings.

[0017] A specific embodiment of the present invention is to design a costas ring with high dynamic range according to the method of the present invention, which can realize carrier extraction of multiple rate input symbols and realize data demodulation of received signals.

[0018] The following are the design steps for a high dynamic range costas ring:

[0019] 1. If figure 1 , The input symbol signal is first filtered, and the appropriate integration period and counting period are selected according to the data rate, and the data is accumulated according to the integration period. Take the integral difference value under the same time interval of different clocks, four integral diff...

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Abstract

The invention provides a carrier synchronization inhibiting technology for demodulating data at the front end of a digital signal processing system of a receiving end. The method simultaneously adopts a plurality of in-phase integrating modules and orthogonal integrating modules for simultaneously performing bit synchronization judgment within multiple clocks before and after the synchronous pulse arrives at to judge the actual phase deviation value in real time. The method is simple in implementation structure, strong in design capability and low in resource consumption, can flexibly deal with different bit synchronization clock frequencies and widen the frequency tolerance value of received signals, and has strong adaptability to different input signals.

Description

technical field [0001] The invention belongs to the technical field of wireless communication synchronization, and in particular relates to a suppression carrier synchronization technology. Background technique [0002] Wireless communication synchronization is mainly divided into carrier synchronization, bit synchronization, frame synchronization and other technologies, and bit synchronization, frame synchronization and other technologies require data demodulation as a prerequisite. According to the different characteristics of the received signal, the carrier synchronization technology is divided into two categories: one is the carrier technology with the carrier frequency component in the signal itself, and the other is the suppressed carrier synchronization technology without the carrier component. [0003] The suppressed carrier synchronization technology is to directly extract the coherent carrier in the received signal through a certain transformation. The costas loop...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L27/227
CPCH04L27/2273
Inventor 史景祎于茫
Owner ZTE INTELLIGENT IOT TECH