Memory element and method of manufacturing the same

Abstract

The present invention relates to a storage element and a manufacturing method thereof. The storage element comprises a substrate, a first stack structure and a plurality of second stack structures. The substrate has a first zone and a second zone. The first stack structure is located on the substrate of the first zone. The second stack structure is located on the substrate of the second zone. The side wall of the first stack structure and the side wall of the second stack structure are concave-convex surfaces.

Description

technical field [0001] The present invention relates to a semiconductor element and its manufacturing method, and in particular to a memory element and its manufacturing method. Background technique [0002] With the rapid development of technology, in order to reduce costs, simplify process steps and save chip area, it has gradually become a trend to integrate components in the memory cell array area and the peripheral circuit area on the same chip. However, as the aspect ratio of the storage device becomes higher and higher, the pattern density between the memory cell array area and the peripheral circuit area is different, which easily leads to the occurrence of micro-loading effect. The so-called micro-loading effect generally refers to deviations in the size of semiconductor elements due to different pattern densities during the etching process. For example, sub-trench defects are prone to appear in the peripheral circuit area with low pattern density, and the sub-tren...

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Problems solved by technology

For example, sub-trench defects are prone to appear in peripheral circuit areas with low pattern density, and sub-trench defects will cause difficulties in subsequent process margins (Window)

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