Level Shifter Circuit

Abstract

A level conversion circuit, comprising: a first P-channel transistor and an N-channel transistor and a second P-channel transistor and an N-channel transistor, respectively connected in series between a first power supply and a second power supply; third and fourth The P-channel transistors are respectively connected between the gates of the second and first P-channel transistors and the drains of the first and second P-channel transistors; and the fifth and sixth P-channel transistors are respectively connected between Between the gates of the second and first P-channel transistors and the third power supply, a differential input signal is applied to the gates of the first and second N-channel transistors, and a bias voltage is applied to the third and fourth P-channel transistors. The gates of the channel transistors, the gates of the fifth and sixth P-channel transistors are respectively connected to the connection node of the first P-channel and N-channel transistor and the connection node of the second P-channel and N-channel transistor. By adopting the solution of the present application, a level conversion circuit compatible with high-voltage and high-speed operation while maintaining a withstand voltage can be realized.

Description

technical field [0001] The invention relates to a level conversion circuit. Background technique [0002] From the viewpoint of power consumption, the voltage of signals transmitted between semiconductor devices (ie, interface (I / F) voltage) has dropped. For example, the voltage of a signal input to or output from a semiconductor memory (eg, DRAM) is lower than or equal to 1.8V. In addition, the data transfer rate exceeds 2Gbps per signal pin. This means that elements forming an input / output circuit are required to be low voltage (low withstand voltage) and have high operating speed. Therefore, it is important for semiconductor devices to satisfy this requirement. On the other hand, contrary to the drop in interface voltage, semiconductor devices using a conventional interface voltage (for example, 3.3V) are still required in the market. This requirement arises to preserve compatibility with semiconductor devices of older interface standards. [0003] In order to meet b...

AI Technical Summary

Problems solved by technology

However, among the level conversion circuits that have been proposed so far, there is no level conversion circuit that satisfies both the speed improvement and the withstand voltage at all.

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