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High-speed analog-to-digital converter and method

A digital converter and high-speed analog technology, applied in the direction of analog-to-digital converter, time-to-digital converter, analog-to-digital conversion, etc., can solve the problems of heavy load and high hardware cost

Active Publication Date: 2017-03-08
REALTEK SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] One of the disadvantages of flash ADC is that it needs L-1 comparators to output L level digital signal, so when L is large, the hardware cost may be prohibitive
Another disadvantage of the flash ADC is that its analog signal needs to be compared with L-1 reference voltages. Therefore, when L is large, the load of the source device that outputs the analog signal may be too heavy

Method used

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  • High-speed analog-to-digital converter and method
  • High-speed analog-to-digital converter and method
  • High-speed analog-to-digital converter and method

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Embodiment Construction

[0059] This disclosure relates to analog to digital conversion. While this specification describes various exemplary embodiments as preferred modes for carrying out the disclosure, it must be understood that the disclosed concept may be embodied in many different forms and should not be construed as limited to the exemplary embodiments set forth in this specification. . Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosed concept to those skilled in the art.

[0060] figure 1 A functional block diagram of an analog-to-digital converter (ADC) 100 according to an embodiment of the present disclosure is shown. The ADC 100 receives an input voltage VI (the specific embodiment of its differential circuit includes a first terminal VIP and a second terminal VIN). In addition, the ADC 100 also receives a plurality of reference voltages, which include, for example but not limited to, ...

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Abstract

A circuit having an input comparator configured to receive an input voltage and output an input dependent polarity signal along with an input dependent timing signal; a reference comparator configured to receive a reference voltage and output a reference dependent polarity signal along with a reference dependent timing signal; a time-to-digital converter configured to receive the input dependent timing signal and the reference dependent timing signal and output a digital signal; and an output encoder configured to receive the input dependent polarity signal and the digital signal and output an output data representing an analog-to-digital conversion of the input voltage.

Description

technical field [0001] The present disclosure relates to analog-to-digital conversion, and more particularly to an analog-to-digital converter and related methods. Background technique [0002] Those skilled in the art should understand that the terms and basic concepts related to microelectronics used in this disclosure, such as analog, digital, voltage, current, signal, logic signal, clock, transistor, P-channel metal-oxide-semiconductor (PMOS ), N-channel metal oxide semiconductor (NMOS), source, gate, drain, circuit node, comparator, amplifier, latch, inverter, NAND gate, flip-flop, resistor, current source, common mode, and differential circuits. Terms and basic concepts similar to the above are known to those skilled in the art, so they will not be repeated here. [0003] In this disclosure, a logic signal refers to a signal with two states: "high" and "low", which can be reformulated as "1" and "0". For simplicity, a logic signal in a "high" ("low") state simply me...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/34
CPCH03M1/34H03M1/50G04F10/005G04F10/00H03M1/12
Inventor 林嘉亮
Owner REALTEK SEMICON CORP