Programmable integrated circuits with different types of configuration memory
An integrated circuit, configuration storage technology, applied in programmable logic circuit devices, logic circuits using specific components, logic circuits, etc., and can solve problems such as reduction in mean time between failures
Active Publication Date: 2020-04-07
XILINX INC
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Problems solved by technology
As the probability of SEU occurrence increases, the mean time to failure of a specific program configuration for a PLD decreases, while the failure in time (FIT) rate increases
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[0014] In the following description, numerous specific details are set forth to describe specific examples presented herein. However, one or more other examples and / or variations from these examples can be practiced without all of the details described below, as will be understood by those skilled in the art. In other instances, well-known details have not been described in detail in order to make the examples herein more understandable. For ease of illustration, the same number may be used in different diagrams to refer to the same element or additional instances of the same element.
[0015] The disclosed methods and circuits relate to programmable ICs in which some (but not all) configuration memory cells are 12T (12-transistor) SRAM cells and other configuration memory cells are 6T (6-transistor) SRAM cells. By implementing a programmable IC where only some of the configuration memory is implemented with 12T SRAM, not all of the interconnect and logic resources in critica...
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To implement a circuit design on a programmable integrated circuit (IC) (100), first data is generated (202) for implementing the circuit design. Critical and non-critical portions of the circuit design are determined (206) and second data is generated (210, 212) for programming configuration memory cells of the programmable IC to implement the circuit design. A first subset of the second data is allocated to program the first type of configuration memory cells (118) such that the first subset (102) of the programmable logic resources and the programmable interconnect resources of the programmable IC Critical portions of the circuit design are implemented on the first subset (106). A second subset of the second data is allocated to program the second type of configuration memory cells (120) such that the second subset of programmable logic resources (104) and the second subset of programmable interconnect resources (108) to implement non-critical parts of the circuit design. The second data is stored (214) in an electronically readable storage medium.
Description
technical field [0001] The present disclosure generally relates to configuration memory for programmable integrated circuits. Background technique [0002] Traditional programmable integrated circuits (ICs), such as complex PLDs (CPLDs) and field-programmable gate arrays (FPGAs), typically use millions of static random-access memory (SRAM) configuration memory cells to control the functionality of the implemented circuits for programming. A configuration storage unit may be, for example, a configuration storage unit used to program interconnect, logic, or memory resources of a programmable IC. [0003] With the emergence of an increasing number of SRAM configuration memory cells in programmable ICs, as chip sizes become smaller and power supply voltages become lower and lower, the configuration memory cell storage state is destroyed by cosmic particles from outer space Or the possibility of flipping due to the collision of alpha particles from the IC packaging material inc...
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IPC IPC(8): G06F11/18G06F30/3323H03K19/0175H03K19/177
CPCH03K19/017581H03K19/1776H03K19/17764G06F11/183G06F30/34
Inventor J·卡普
Owner XILINX INC