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A Hardware Acceleration Circuit for Polygon Filling

A hardware-accelerated, polygon-based technology, applied to the details of image processing hardware, processor architecture/configuration, etc., can solve problems such as difficulty in meeting high-resolution and real-time application requirements, low polygon filling efficiency, and complex algorithms

Active Publication Date: 2020-10-20
SUZHOU CHANGFENG AVIATION ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the existing software algorithms for polygon filling have the following defects: complex algorithms, low polygon filling efficiency, and difficulty in meeting high-resolution and real-time application requirements

Method used

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  • A Hardware Acceleration Circuit for Polygon Filling

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Embodiment Construction

[0019] The present invention will be described in detail below in conjunction with the accompanying drawings.

[0020] A hardware acceleration circuit for polygon filling, said circuit comprising: DSP digital signal processor 1, FPGA programmable logic device 2, first frame memory 8 and second frame memory 9;

[0021] The FPGA programmable logic device 2 includes a frame memory controller 3, a timing module 4, a state machine 5, a flag data register 6, and a color data register 7;

[0022] Wherein, the frame memory controller 3 is respectively connected with the DSP digital signal processor 1, the first frame memory 8, the second frame memory 9, the timing module 4, the state machine 5, the mark data register 6, and the color data register 7;

[0023] The timing module 4 , the mark data register 6 , and the color data register 7 are also connected to the state machine 5 respectively.

[0024] Described DSP digital signal processor 1 is used for carrying out drawing algorithm ...

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Abstract

The invention belongs to the technical field of graphics generation, and relates to a hardware acceleration circuit for polygon filling. The hardware acceleration circuit for polygon filling comprises a DSP digital signal processor, an FPGA programmable logic device, a first frame buffer and a second frame buffer, wherein the FPGA programmable logic device comprises a frame buffer controller, a flag data register, a color data register, a state machine and a time series module; the frame buffer controller is connected with the DSP digital signal processor, the first frame buffer, the second frame buffer, the time series module, the state machine, the flag data register and the color data register; and the time series module, the flag data register and the color data register are connected with the state machine. According to the hardware acceleration circuit for polygon filling, the polygon filling efficiency can be remarkably improved, and the software algorithm load ca be reduced, so that the whole picture generation efficiency is improved.

Description

technical field [0001] The invention belongs to the technical field of graphic generation, and relates to a hardware acceleration realization method and circuit for polygon filling. Background technique [0002] Polygon filling is an important research content of computer graphics. Its function is to modify all pixel units in a given polygonal closed area on the display screen to the specified color data. The existing polygon filling algorithms are generally realized by software algorithms, such as seed filling algorithm, scanning line filling algorithm, edge mark filling algorithm and so on. Its feature is that the software calculates all the pixel color data in the polygon area that needs to be filled and writes it into the frame memory. [0003] With the development of technology, the resolution of liquid crystal displays is getting higher and higher, which involves more and more polygon filling requirements, and the content of the screen to be displayed is also becoming...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06T1/20
CPCG06T1/20G06T2200/28
Inventor 高伟林王涛钟海林杨粤涛于小燕
Owner SUZHOU CHANGFENG AVIATION ELECTRONICS
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