Terminal structure and manufacturing method therefor and power semiconductor device

Abstract

The invention discloses a terminal structure and a manufacturing method therefor and a power semiconductor device. A polysilicon layer is deposited on the surface of a base material firstly; then multiple transitional oxygen-doped semi-insulating polysilicon layers with increasing oxygen contents are deposited in different stages; and finally, nitrogen monoxide with target flow is stably pumped to deposit a target oxygen-doped semi-insulating polysilicon layer with target oxygen content. The polysilicon layer, the transitional oxygen-doped semi-insulating polysilicon layers and the target oxygen-doped semi-insulating polysilicon layer are grown along the interface of the base material, and the oxygen contents of the transitional oxygen-doped semi-insulating polysilicon layers and the target oxygen-doped semi-insulating polysilicon layer are gradually changed, so that trap generated by interface sudden change is lowered, charge accumulation on the interface is reduced, and leakage current is further lowered and the high performance of the power semiconductor device is ensured.

Description

technical field [0001] The present invention relates to a power semiconductor device, and more specifically, to a terminal structure, a manufacturing method thereof, and a power semiconductor device. Background technique [0002] The withstand voltage of a power semiconductor device is determined by the internal breakdown voltage and the surface breakdown voltage. Due to the influence of the curvature of the PN junction on the surface, the maximum electric field on the surface is greater than the maximum electric field in the body, so the withstand voltage of the device is often determined by the surface breakdown voltage. Moreover, when impact ionization occurs on the surface, the hot carriers generated during the ionization process easily enter the silicon dioxide, where they form fixed charges and change the electric field distribution, resulting in unstable device performance and reduced reliability. The ideal single-crystal lattice of a semiconductor surface is disrupt...

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Problems solved by technology

(2) The SIPOS resistance is between polysilicon and SiO2, the specific value is determined by its oxygen content, so the carriers can move inside it, and the injected hot electrons cannot exist in the SIPOS film for a long time, so there is no carrier storage effect

However, in the existing manufacturing process, when an oxygen-doped semi-insulating polysilicon layer is grown on the silicon interface, a large number of traps will appear due to changes at the interface, and the traps will trap charges, thereby forming charge accumulation and increasing leakage current

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