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A Dynamic Elimination Method of Output Voltage Offset of Adaptive On-time Controlled Converter

A technology of on-time and output voltage, applied in the direction of converting DC power input to DC power output, control/regulation systems, output power conversion devices, etc., can solve problems such as insufficient stability and adjustment accuracy, and avoid repetition. Design, ensure stability, improve the effect of adjustment accuracy

Inactive Publication Date: 2019-03-01
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] Aiming at the problem of insufficient stability and adjustment accuracy caused by the current adaptive on-time control system, the present invention provides a dynamic elimination method for the output voltage offset of the adaptive on-time control converter

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  • A Dynamic Elimination Method of Output Voltage Offset of Adaptive On-time Controlled Converter
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  • A Dynamic Elimination Method of Output Voltage Offset of Adaptive On-time Controlled Converter

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Embodiment Construction

[0046] A control loop equivalent architecture block diagram of an adaptive on-time control converter system applicable to the present invention is as follows figure 1 As shown, SW is the switching output node of the system, and the output voltage V OUT The feedback voltage V is obtained by dividing the voltage of the tenth resistor RF1 and the eleventh resistor RF2 FB . The present invention adopts an on-chip compensation technology, by filtering the potential information at the system switch output node SW to obtain a sawtooth wave signal containing DC information and inductor current information, that is, the first-order filter output value V SW_F1 , and then use the filter circuit to obtain its DC component V SW_F3 ; Then the third-order filter output value V SW_F3 The filtered DC output value V is obtained by the DC extraction method SW_DC , and then use the ripple current generation circuit to output the first-order filter V SW_F1 and ripple DC amount V SW_DC Do the...

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Abstract

The invention relates to a method for dynamically eliminating the output voltage offset of an adaptive conduction time control converter, which belongs to the technical field of electronic circuits. The first-order filter output value V is obtained by filtering the potential information at the system switch output node SW SW_F1 , and then use the filter circuit to obtain its DC component, that is, the third-order filter output value V SW_F3 ; Then the third-order filter output value V SW_F3 The filtered DC output value V is obtained by the DC extraction method SW_DC , and then use the ripple current generation circuit to output the first-order filter V SW_F1 and filtered DC output value V SW_DC doing the difference to get the amount of ripple AC I OUT , and then through the ripple superposition circuit, the ripple AC value I OUT converted into voltage information and feedback signal V FB Addition, so as to ensure that the output capacitor ripple with phase lag is weaker than the compensated ripple, ensure the stable operation of the system, and improve the output voltage adjustment accuracy of the system; at the same time, it avoids the traditional off-chip ripple compensation circuit in different applications The parameters need to be designed repeatedly, which broadens the scope of application of the circuit.

Description

technical field [0001] The invention belongs to the technical field of electronic circuits, and in particular relates to a method for dynamically eliminating the output voltage offset of an adaptive conduction time control converter. Background technique [0002] Compared with the traditional voltage mode control or current mode control, the control system based on output ripple has the characteristics of faster transient response and simple control loop, especially the ripple control based on constant on-time The potential of adaptive constant frequency characteristics has attracted much attention. [0003] However, in constant conduction control mode, the feedback voltage V FB By constantly triggering the valley limit i.e. the reference voltage V REF To trigger the on-time Ton timing, the feedback voltage V FB The DC level is the same as the reference voltage V REF There is a certain offset voltage ΔV between them. This offset is caused by the system imbalance caused b...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02M3/158H02M1/14
CPCH02M1/143H02M3/158
Inventor 周泽坤徐俊李天生石跃王卓张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA