Dye-sensitized solar battery, and battery module, grid electrode and battery module manufacturing process method thereof
A solar cell, dye sensitization technology, applied in electrolytic capacitors, circuits, capacitors, etc., can solve the problems of increased width, long electron transmission path, and reduced efficiency, achieving high aperture ratio, efficient collection and conduction, and battery stability reliable effect
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specific Embodiment 1
[0076] A grid electrode structure of a dye-sensitized solar cell module, in which a sub-gate electrode is arranged on the third conductive layer of the solar cell module; the main grid electrode of the third conductive layer is connected with the first conductive layer and the second conductive layer of the battery module The long sides are parallel; the number of the sub-gate electrodes is greater than or equal to one; one end of the sub-gate electrodes of the third conductive layer is directly or indirectly connected to the main gate electrode through other sub-gate electrodes, and the other end is directly or indirectly connected through other sub-gate electrodes. Extending to the working area of the battery, forming an angle greater than 0 and less than or equal to 180 degrees with the main grid electrode; the resistivity of the main grid electrode and the sub-gate electrode of the third conductive layer is smaller than the resistivity of the first conductive layer and the...
specific Embodiment 2
[0078] On the basis of the specific embodiment 1, the sub-gate electrodes are in the form of a straight line or an arbitrary curve with equal intervals and uniform distribution, or a straight line or an arbitrary curve with unequal intervals and uneven distribution.
specific Embodiment 3
[0080] On the basis of the specific embodiment 1 or 2, the sub-gate electrode is respectively set on the third conductive layer on the first substrate of the solar cell module and the third conductive layer on the second substrate; the third conductive layer on the first substrate The sub-gate electrode of the first substrate is disposed between the first conductive layer and the metal oxide semiconductor; the sub-gate electrode of the third conductive layer on the second substrate is disposed between the second conductive layer and the counter electrode on the second substrate between.
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