A High Speed Clock Receiver Circuit with Programmable Adjustable Common Mode Level
A high-speed clock and receiving circuit technology, applied in electrical components, pulse technology, pulse processing and other directions, can solve the problem of not transmitting common mode level, etc., to achieve the effect of improving flexibility, increasing complexity, and increasing ineffective power consumption
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[0036] Below in conjunction with accompanying drawing and specific embodiment the present invention is described in further detail:
[0037] Such as figure 1 As shown, a high-speed clock receiving circuit with programmable adjustment of common mode level includes bias circuit, logic control circuit, binary current source and switch array, binary current sink and switch array and receiving control circuit. The bias circuit provides bias to the binary current source and switch array, the binary current sink and the switch array; the logic control circuit decodes the input control code word into the switch control signal of the binary current source and the switch array, the binary current sink and the switch array ;The binary current source and switch array and the binary current sink and the switch array are respectively connected to the clock input terminal to supplement and extract the current to realize the adjustment of the common mode level of the clock signal; the input c...
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