Transistor structure and preparation method thereof

Abstract

The invention provides a transistor structure and a preparation method thereof. The preparation method comprises the steps of: (1), providing a substrate, and forming a groove structure in the substrate; (2), forming a dielectric layer at the bottom and on the side wall of the groove structure; and (3), forming a double-conducting-layer structure on the surface of the dielectric layer, wherein the double-conducting-layer structure comprises a first conducting layer and a second conducting layer formed at the bottom and on the local side wall of the dielectric layer; the second conducting layer comprises a filling part and a protrusion part; the filling part is combined in the first conducting layer; the protrusion part is positioned on the top of the filling part; the top of the first conducting layer is lower than the upper surface of the substrate; and the top of the protrusion part is higher than the top of the first conducting layer and lower than the upper surface of the substrate. By means of the scheme, the height of a grid word line is increased; the resistance of the grid word line is reduced; the access time of the device is reduced; the distance between a P / N junction and a drain is increased; the electric field near the grid is reduced; the grid induced drain leakage current can be reduced.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit manufacturing, and in particular relates to a transistor structure and a preparation method thereof. Background technique [0002] Dynamic Random Access Memory (DRAM for short) is a semiconductor storage device commonly used in computers, and is composed of many repeated storage units. Each memory cell is mainly composed of a transistor and a capacitor controlled by the transistor, and the memory cells are arranged in an array, and each memory cell is electrically connected to each other through a word line and a bit line. As electronic products are increasingly light, thin, short, and small, the design of DRAM components must also meet the requirements of high integration and high density, and the trend toward miniaturization is developing. In order to speed up the operation speed of components and meet the needs of consumers for miniaturized electronic devices, an embedded gate word ...

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Problems solved by technology

[0005] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a transistor structure and its preparation method, especially for solving the phenomenon of the reduction of the gate word line resistance and the gate-induced drain leakage current in the prior art conflicting issues

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