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Fault-tolerant routing method and device and network-on-chip

An on-chip Internet and routing technology, applied in the computer field, can solve the problem of low information transmission efficiency, and achieve the effect of improving the recognition granularity and accuracy

Active Publication Date: 2017-09-15
XFUSION DIGITAL TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] In order to solve the problem of low information transmission efficiency, the embodiment of the present invention provides a fault-tolerant routing method, device and network on chip

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Embodiment Construction

[0111] In order to make the object, technical solution and advantages of the present invention clearer, the implementation manner of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0112] Please refer to figure 1 , which shows a schematic structural diagram of a grid-type NoC involved in the fault-tolerant routing method provided by the embodiment of the present invention. Such as figure 1 As shown, on the grid-type NoC, the surface area of ​​the NoC chip is divided into multiple grids of the same shape and size by a plurality of criss-cross interconnection lines, usually a square grid. Communication nodes are set at each intersection, referred to as nodes, figure 1 The grid-type NoC is divided into 10*10 square grids as an example for illustration. Nodes are represented by circles. It should be noted that, fault tolerance (fault-tolerance) refers to tolerant faults, once a fault occurs, it can be automatical...

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PUM

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Abstract

The invention discloses a fault-tolerant routing method and device and a network-on-chip and belongs to the field of a computer. The method is applied to a first node of the network-on-chip NoC. The method comprises the steps of receiving to-be-transmitted information, wherein the to-be-transmitted information comprises position information of a destination node, wherein the position information is used for indicating a position of a chip on the NoC; when the first node is not the destination node and is the node on a fault ring, judging whether the to-be-transmitted information can be transmitted on the fault ring in a bidirectional bypass mode or not, wherein the bidirectional bypass transmission comprises the transmission along a clockwise direction and the transmission along an anti-clockwise direction; when the to-be-transmitted information can be transmitted on the fault ring in the bidirectional bypass mode, determining the shortest path in paths formed by the bidirectional bypass transmission; and transmitting the to-be-transmitted information to a next node based on the shortest path. According to the method, the device and the network-on-chip, the problem that the transmission efficiency of the information is relatively is solved and the transmission efficiency of the information is improved. The embodiment of the invention is applied to inter-node communication on the NoC.

Description

technical field [0001] The invention relates to the field of computers, in particular to a fault-tolerant routing method, device and on-chip network. Background technique [0002] Network-on-chip (English: network-on-chip; Abbreviation: NoC) refers to the integration of a large number of computing resources on the chip and the on-chip communication network connecting these resources. NoC includes two subsystems of computing and communication. The computing subsystem completes the generalized "computing" tasks, including multiple computing resources. The computing resources include processing modules (English: process element; PE for short), also known as cores. It can be a central processing unit (English: Central Processing Unit; abbreviation: CPU), or an intellectual property core (English: intellectual property core; abbreviation: ip core) with various special functions, a memory array or reconfigurable hardware, etc.; The communication subsystem is responsible for conne...

Claims

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Application Information

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IPC IPC(8): H04L12/721H04L12/703H04L12/931H04L12/939H04L45/28
CPCH04L45/12H04L45/28H04L49/358H04L49/557
Inventor 袁泉李扬张惠敏
Owner XFUSION DIGITAL TECH CO LTD