An online visual inspection system and method for chip pins based on hierarchical parallel computing

Abstract

The invention discloses a hierarchical parallel computing chip pin online visual detection system and a method thereof. The system is divided into a bottom processing platform and an upper processing platform. The bottom processing platform is mainly responsible for reading and preprocessing of chip images, and processing existing Chips with obvious defects are eliminated, and the upper-layer processing platform is mainly responsible for more complex defect calculations on chip pin images. The detection method of the present invention divides the calculation content of the chip visual signal into different calculation levels according to the order and complexity, and allocates them to the corresponding parallel computing platform. The underlying processing platform ensures that whether there are obvious defects can be judged at a relatively fast speed. For those that require further calculation and judgment, they are processed in parallel through the upper-layer processing platform, ultimately ensuring real-time response to the processing speed. The invention realizes online detection of multi-pin chips, has good scalability, and adapts to the current online detection needs of the chip manufacturing industry, which increasingly require processing speed and accuracy.

Description

technical field [0001] The technical field of chip package inspection of the present invention, in particular relates to a layered parallel computing chip pin online visual inspection system and method thereof. Background technique [0002] At present, the existing visual inspection line for chip pin size often uses a single computing platform to complete the work from image preprocessing, defect detection, and sorting action realization. However, with the rapid development of integrated circuit manufacturing, the packaging styles continue to increase, and the number of pins also increases with the need, which makes it difficult for ordinary visual inspection lines to meet current and future development needs. Therefore, how to solve the problems that the current chip pin size detection line is facing is becoming more and more complex, the amount of calculation is increasing, the real-time performance is difficult to guarantee, and the calculation accuracy is also affected, ...

AI Technical Summary

Problems solved by technology

However, with the rapid development of integrated circuit manufacturing, the packaging styles continue to increase, and the number of pins also increases with the need, which makes it difficult for the general visual inspection line to meet the current and future development needs.

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