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semiconductor storage device
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A storage device and semiconductor technology, applied in semiconductor devices, information storage, semiconductor/solid-state device components, etc., can solve problems such as increased electrode film resistance
Active Publication Date: 2021-12-14
株式会社PANGEA
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Abstract
Description
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Problems solved by technology
In this kind of multilayer semiconductor memory device, there is a problem that the resistance of the electrode film increases with higher integration.
Method used
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no. 1 approach
[0027] First, a first embodiment will be described.
[0028] figure 1 It is a perspective view showing the semiconductor memory device of this embodiment.
[0029] figure 2 It is a plan view showing the semiconductor memory device of this embodiment.
[0030] image 3 is along figure 2 A cross-sectional view along line A-A' is shown.
[0031] Figure 4 is along figure 2 A cross-sectional view along line BB' is shown.
[0032] Figure 5 yes means figure 2 An enlarged top view of region C of .
[0033] Figure 6 yes means image 3 An enlarged cross-sectional view of region D.
[0034] In addition, each figure is a schematic figure, and it exaggerates and omits drawing appropriately. For example, each constituent element is drawn smaller and larger than it actually is. In addition, the numbers of components, dimensional ratios, and the like do not necessarily match among the drawings.
[0035] The semiconductor memory device of this embodiment is a stacked NAN...
no. 2 approach
[0089] Next, a second embodiment will be described.
[0090] Figure 14 It is a plan view showing the semiconductor memory device of this embodiment.
[0091] Such as Figure 14 As shown, in the semiconductor memory device 2 of the present embodiment, the maximum diameter Da of the columnar member 20a is larger than the maximum diameter Db of the columnar member 20b and the maximum diameter Dc of the columnar member 20c when viewed in the Z direction. That is, Da>Db, Da>Dc. In addition, when the shape of the columnar member 20 is not a true circle as viewed from the Z direction, the diameter of the circumscribed circle of the columnar member 20 is defined as the maximum diameter.
[0092] In the first embodiment, the columnar member 20a is different from the columnar members 20b and 20c in that it is not arranged at each lattice point Lp of the lattice La (see figure 2 ). Thus, in Figure 8 In the photolithography step shown, depending on the conditions, there are cases...
no. 3 approach
[0095] Next, a third embodiment will be described.
[0096] Figure 15 It is a plan view showing the semiconductor memory device of this embodiment.
[0097] Such as Figure 15 As shown, in the semiconductor memory device 3 of the present embodiment, the regions Ra and the regions Rb are alternately arranged in the X direction. The length of the region Rb in the X direction is longer than the length of the region Ra in the X direction. In addition, as described in the sixth embodiment described below, the length of the region Rb may be made shorter than the length of the region Ra, or the length of the region Rb may be made equal to the length of the region Ra. In the present embodiment, a plurality of, for example, three columnar members 20a are provided in the region Ra. For example, in the area Ra, columnar members 20a are provided at each lattice point Lp (refer to figure 2 ). In this case, in the region Ra, the arrangement period Pa of the columnar members 20a in t...
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Abstract
The present invention is a semiconductor memory device having a low electrode film resistance. The semiconductor storage device includes: a first electrode film extending in a first direction; a second electrode film disposed on the second direction of the first electrode film and extending in the first direction; a third electrode film disposed on the first electrode film in the second direction, extending along the first direction; the insulating part, arranged between the second electrode film and the third electrode film, extending along the first direction; the first semiconductor part, extending along the second direction, penetrating through the first electrode film and the second electrode film; the second semiconductor component extends along the second direction and penetrates the first electrode film and the third electrode film; and the third semiconductor component extends along the second direction, and the first part is arranged between the second electrode film and the third electrode film The third electrode films are in contact with the insulating component, and the second part penetrates the first electrode films. In the first direction, the arrangement density of the third semiconductor components is smaller than the arrangement density of the first semiconductor components and the arrangement density of the second semiconductor components.
Description
[0001] [Related applications] [0002] This application enjoys the priority of the basic application based on Japanese Patent Application No. 2016-217885 (filing date: November 8, 2016). This application incorporates the entire content of the basic application by referring to this basic application. technical field [0003] Embodiments relate to a semiconductor memory device. Background technique [0004] In recent years, a stacked semiconductor memory device in which memory cells are three-dimensionally integrated has been proposed. In such a laminated semiconductor memory device, a laminate in which electrode films and insulating films are alternately laminated on a semiconductor substrate is provided, and a semiconductor pillar penetrating the laminate is provided. Also, a memory cell transistor is formed at each intersection of the electrode film and the semiconductor pillar. In such a multilayer semiconductor memory device, there is a problem that the resistance of t...
Claims
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Application Information
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