Switching system built through switches and routing algorithm thereof

A switching system and switching mechanism technology, applied in the field of communications, can solve problems such as load imbalance, link resource competition, performance degradation, etc., and achieve the effects of low latency, high performance, and low cost

Active Publication Date: 2018-07-06
DAWNING INFORMATION IND BEIJING +1
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0012] Among them, the shortest path routing algorithm refers to the shortest path distance from the source node to the target node, which has the characteristics of the shortest communication distance and the lowest delay, but it is usually a deterministic route, which does not consider the transformation of the network state and does not have fault tolerance. , it is easy to cause congestion and lead to network performance degradation; the adaptive routing algorithm dynamically selects the route according to the congestion of the channel, the advantage is that the route is flexible, the link utilization rate is high, and it has fault tolerance. Deadlock and out-of-order problems
[0013] In addition, the network switch needs a certain buffer to store data packets, but the capacity of the buffer is limited. For those packets whose headers have not reached the destination node, on the one hand, they need to request buffer resources, and at the same time occupy the current The buffer for buffering messages, the circular occupation of such channel resources may cause deadlock
At present, by adding virtual channels to build virtual subnets, deadlocks can be effectively avoided by separating traffic, but the disadvantage of this method is that it requires more resources, and it will greatly increase system costs for ultra-large-scale networks with high-dimensional topologies; And the escape virtual channel can also be used to avoid deadlock. When congestion occurs, the data packet enters the escape virtual channel route, which can resolve the congestion situation. The disadvantage is that the utilization rate of the escape channel is relatively low; and the date change line can also be used The (Dateline) method can also effectively avoid deadlocks. For the deadlocks caused by the cyclical occupation of channel resources, you can set Ddateline to destroy this cyclical occupation to avoid deadlocks. Therefore, for each circularly dependent ring, select A node is used as the timeline, and the network packet is first transmitted in virtual channel 0. After entering the timeline, it is forced to switch to virtual channel 1 for transmission, which can avoid loop deadlock, but this method will lead to partial channel data utilization Not high, unbalanced load
[0014] To sum up, there is currently no general method for constructing a fully interconnected topology based on commercial switches. At the same time, the shortest path routing algorithm can be directly used in a fully interconnected network. However, for applications with unbalanced communication loads, the competition for link resources is serious and will Problems that lead to network congestion and severe performance degradation
[0015] For the problems in related technologies, no effective solutions have been proposed yet

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  • Switching system built through switches and routing algorithm thereof
  • Switching system built through switches and routing algorithm thereof
  • Switching system built through switches and routing algorithm thereof

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Embodiment Construction

[0043] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments of the present invention belong to the protection scope of the present invention.

[0044] According to an embodiment of the present invention, a switching system constructed by switches is provided.

[0045] Such as image 3 As shown, the switching system constructed by switches according to the embodiment of the present invention includes: a plurality of switches, each switch has 2N ports, wherein, the N ports of each switch are respectively connected to other switches, and the remaining ports of each switch The N ports of are respectively connected to nodes, where N is a...

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Abstract

The invention discloses a switching system built through switches and a routing algorithm thereof. The switching system built through the switches comprises a plurality of switches, wherein each switch is provided with 2N ports; the N ports of each switch are connected with other switches respectively; the remaining N ports of each switch are connected with nodes respectively; and N is a positiveinteger. According to the switching system, the N ports of each switch are connected with the other switches respectively, and the remaining N ports of each switch are connected with the nodes respectively, so that a fully interconnected network is built. The switching system has the advantages of low cost, low power consumption, low delay, high performance and the like.

Description

technical field [0001] The invention relates to the communication field, in particular to a switching system constructed by switches and a routing algorithm thereof. Background technique [0002] Among the existing technologies, the "High Productivity Computing Systems (HPCS)" research program formulated by the U.S. Department of Defense in 2002 took the lead in proposing high performance as the goal of developing a new generation of high-performance computers. High performance represents a new direction of high-performance computer research, which includes the requirements of high performance, programmability, portability, stability and other aspects. At the same time, the research fields of high-performance computers mainly include: high bandwidth, low latency Hierarchical storage system; a balanced system architecture that balances processors, memory, network bandwidth, system software, and development languages; robustness strategies; new metrics and benchmarking procedu...

Claims

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Application Information

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Patent Type & AuthorityApplications(China)
IPC IPC(8): H04L12/933H04L12/947H04L12/935H04L12/741H04L45/74H04L49/111
CPCH04L45/745H04L49/15H04L49/25H04L49/30
Inventor苏勇
OwnerDAWNING INFORMATION IND BEIJING