An optimization method and device for a parallel competitive neural network chip

Abstract

The invention discloses a parallel competitive neural network chip optimization method and apparatus. The apparatus comprises a cache unit, multiple reconfigurable network matrix units, a value-takingunit and a main control unit. The method comprises the following steps that the reconfigurable network matrix units obtain parameter elements in the cache unit according to initial parameter configuration information sent by the main control unit and constructs corresponding neural network units; and the neural network units perform neural network training, and the main control unit continuouslyeliminates the neural network units with worst training results according to training results of the neural network units and re-allocates circuit resources (namely parameter elements) of eliminated neural networks to non-eliminated neural networks, until a quantity of residual neural network units is not greater than a preset quantity value, wherein the residual neural network units have optimalcircuit resources. The neural network calculation can be effectively performed, so that the identification efficiency is improved.

Description

technical field [0001] The invention relates to the field of electronic equipment, in particular to an optimization method and device for a parallel competitive neural network chip. Background technique [0002] With the rapid development of artificial intelligence deep learning neural network, people's demand for artificial intelligence applications is becoming more and more intense, such as intelligent speech recognition dialogue, intelligent face recognition, etc., recognition algorithm based on neural network is one of the important ones. Due to the complexity of deep learning neural network calculations, it consumes a lot of hardware circuit resources, and for most end-user devices (such as mobile handheld devices), it is difficult to allow multiple complex neural network training circuits to be accommodated. Therefore, a major contradiction in the current deep learning neural network training is the contradiction between limited circuit resources and the huge requireme...

AI Technical Summary

Problems solved by technology

[0003] Therefore, it is necessary to provide an optimized technical solution for parallel competitive neural network chips to solve the problem that the hardware resources of current terminal equipment cannot adapt to multiple neural network training circuits.

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