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Processor debugging method and system

A debugging method and processor technology, applied in the electronic field, can solve problems such as low efficiency and long debugging time, and achieve the effect of avoiding auxiliary operations and improving debugging efficiency

Active Publication Date: 2019-10-25
TSINGHUA UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since the instruction register of the processor is used in the debugging process, it needs to be protected after entering the debugging mode and the register information of the normal operation of the program needs to be restored before exiting the debugging mode, resulting in long debugging time and low efficiency

Method used

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  • Processor debugging method and system
  • Processor debugging method and system

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Embodiment Construction

[0031] Hereinafter, embodiments of the present invention will be described with reference to the drawings. It should be understood, however, that these descriptions are exemplary only and are not intended to limit the scope of the present invention. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concept of the present invention.

[0032] The terminology used herein is for the purpose of describing particular embodiments only, and is not intended to be limiting of the invention. The terms "comprising", "comprising", etc. used herein indicate the presence of stated features, steps, operations and / or components, but do not exclude the presence or addition of one or more other features, steps, operations or components.

[0033] All terms (including technical and scientific terms) used herein have the meaning commonly understood by one of ordinary skill in the art, unless otherwise defined. ...

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Abstract

The invention provides a processor debugging method. The processor comprises a reconfigurable computing array, wherein the reconfigurable array comprises a plurality of processing units and a plurality of registers corresponding to the plurality of processing units. The method comprises the following steps of: receiving a debug instruction, controlling at least one processing unit to switch between a using state and a non-using state by a token to control the reconfigurable computing array to execute the debug instruction, generating debugging data and storing the debugging data in the registers corresponding to the at least one processing unit and the debugging data in the registers corresponding to the at least one processing unit is imported. The invention also provides a processor debugging system and a computer readable storage medium. According to the embodiment of the invention, the debugging efficiency of the reconfigurable processors can be improved.

Description

technical field [0001] The present invention relates to the field of electronic technology, and more specifically, to a processor debugging method and system. Background technique [0002] As the SoC becomes more complex, chip verification and debugging becomes more and more difficult. The traditional debugging technology is that the debugging host generates a debugging request by setting a certain bit of the register, and the processor enters the debugging mode after receiving the debugging request, and makes the debugging response signal valid. When in debug mode, the processor stops working and is isolated from the rest of the system. At this time, the core of the CPU no longer fetches instructions from the read-only memory, but the debugging host pokes the instructions that need to be executed by the processor into the instruction register of the processor through the interface. Select the appropriate instructions and control the execution of these instructions, and th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/07G06F11/263
CPCG06F11/0721G06F11/2635
Inventor 刘雷波朱敏魏少军
Owner TSINGHUA UNIV
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