Fixed-point calculation method and device of depth neural network based on FPGA

Abstract

The invention discloses a fixed-point calculation method and device of a depth neural network based on FPGA. The method comprises the following steps: carrying out fixed-point processing on image data, and converting floating-point number in image data into fixed-point number; quantizing all the values in the filter of the neural network to exponential power of 0 or 2; performing shift addition ofthe image data after fixed-point processing and the quantized filter to obtain the convolution result. By quantizing all the values in the filters of the neural network to an exponential power of 0 or 2, the dot product operation in the convolution process of the deep neural network can be transformed into a cheaper shift addition operation; since the shift addition operation on FPGA devices is implemented based on logical units, the method can fundamentally make neural network get rid of the dependence on hardware DSP in the operation process, and expand the parallelism, computational efficiency and energy consumption ratio of neural network units on FPGA devices.

Description

technical field [0001] The invention relates to the field of computer information technology, in particular to a fixed-point calculation method and device based on an FPGA-based deep neural network. Background technique [0002] With the development of science and technology in modern society, although the current FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) equipment has supported various complex floating-point or fixed-point operations to a certain extent, the efficiency of floating-point operations is very important for FPGAs. There is a serious dependence on the number of DSP (Digital Signal Processing, digital signal processing) on ​​the device, and the FPGA device itself realizes the calculation in the program through the hardware circuit, and once its resources are consumed, they will not be recycled and redistributed. [0003] In the prior art, the overall computing efficiency of the current FPGA device is largely limited by the number of hardw...

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Problems solved by technology

[0002] With the development of science and technology in modern society, although the current FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) equipment has supported various complex floating-point or fixed-point operations to a certain extent, the efficiency of floating-point operations is very important for FPGAs. There is a serious dependence on the number of DSP (Digital Signal Processing, digital signal processing) on ​​the device, and the FPGA device itself realizes the calculation in the program through the hardware circuit, and once its resources are consumed, they will not be recycled and redistributed

[0003] In the prior art, the overall computing efficiency of the current FPGA device is largely limited by the number of hardware DSPs on the FPGA device, although fixed-point operations can be used instead of floating-point operations to reduce the usage of DSPs to a certain extent. But the parallelism of complex programs is still limited by the number of DSPs

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