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A breakdown test structure, display panel and breakdown test method

A technology for testing structures and display panels, which is applied in the direction of testing dielectric strength, measuring electricity, measuring devices, etc., and can solve problems such as inaccurate test results of film conditions.

Active Publication Date: 2021-01-08
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The invention provides a breakdown test structure, a display panel and a breakdown test method to solve the problem of inaccurate test results of the existing test structure on the state of the film layer

Method used

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  • A breakdown test structure, display panel and breakdown test method
  • A breakdown test structure, display panel and breakdown test method
  • A breakdown test structure, display panel and breakdown test method

Examples

Experimental program
Comparison scheme
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Embodiment 1

[0038] refer to Figure 2a A plan view of a breakdown test structure provided by the illustrated embodiment of the present invention, and Figure 2b The cross-sectional view of the breakdown test structure shown, the structure includes:

[0039] base 20;

[0040] an active layer 21, the active layer 21 is disposed on the substrate 20;

[0041] A gate insulating layer 22, the gate insulating layer 22 is disposed on the active layer 21, and the region of the gate insulating layer 22 corresponding to the edge of the active layer 21 is a climbing region 222, which is located in the climbing region The inner area is the plane area 221;

[0042] Gate layer 23, the gate layer 23 is arranged on the gate insulating layer 22, referring to image 3 The plan view of the shown breakdown test structure includes a first gate portion 231 and a second gate portion 232 that are connected, the first gate portion 231 covers the plane region 221, and the second gate portion 232 covers the In ...

Embodiment 2

[0059] An embodiment of the present invention provides a display panel. The display panel includes the breakdown test structure as described in the first embodiment. The breakdown test structure includes:

[0060] base 20;

[0061] an active layer 21, the active layer 21 is disposed on the substrate 20;

[0062] A gate insulating layer 22, the gate insulating layer 22 is disposed on the active layer 21, and the region of the gate insulating layer 22 corresponding to the edge of the active layer 21 is a climbing region 222, which is located in the climbing region The area inside 222 is the plane area 221;

[0063] A gate layer 23, the gate layer 23 is disposed on the gate insulating layer 22, and includes a first gate portion 231 and a second gate portion 232 connected to each other, the first gate portion 231 covers the planar region 221 , the second gate portion 232 covers the ramp region 222 , and the first gate portion 231 and / or the second gate portion 232 is a hollow ...

Embodiment 3

[0067] refer to Figure 5 , shows a flow chart of steps of a breakdown test method provided by an embodiment of the present invention. Applied to the breakdown test structure described in Embodiment 1, the breakdown test structure includes a substrate 20, an active layer 21, a gate insulating layer 22 and a gate layer 23, and the gate insulating layer 22 includes a climbing region 222 and In the plane region 221, the gate layer 23 includes a first gate portion 231 and a second gate portion 232, the first gate portion 231 and / or the second gate portion 232 are hollow patterns, and the method includes:

[0068] Step 301 , applying a voltage on the active layer 21 and the gate layer 23 , wherein the voltage increases gradually.

[0069] In this embodiment, the active layer 21 and the gate layer 23 are arranged on both sides of the gate insulating layer 22, and as two electrodes for testing the breakdown voltage of the gate insulating layer 22, the active layer 21 and the gate la...

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Abstract

The invention provides a breakdown test structure, a display panel and a breakdown test method. The structure comprises a base, an active layer, a gate insulation layer and a gate layer. The active layer is arranged on the base. The gate insulation layer is arranged on the active layer, an area of the gate insulation layer corresponding to the edge of the active layer is a climbing area, and the area inside the climbing area is a plane area. The gate layer is arranged on the gate insulation layer, and consists of a first gate part and a second gate part connected with each other. The first gate part covers the plane area, and the second gate part covers the climbing area. The first gate part and / or the second gate part are / is a hollowed-out pattern(s) in order to expose the gate insulationlayer. According to the embodiments of the invention, during the test of the breakdown voltage of the gate insulation layer, which of the plane area and the climbing area is broken down and which isbroken down first can be determined according to the breakdown position, and the film condition of the gate insulation layer can be accurately known according to the breakdown phenomenon.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a breakdown test structure, a display panel and a breakdown test method. Background technique [0002] In recent years, with the development of OLED (Organic Light-Emitting Diode, organic light-emitting diode) products, the manufacturing process of OLED products has become more and more complicated. The quality of the front-layer process will directly affect the subsequent manufacturing process, and even affect the entire process flow. . Under this development trend, it becomes more and more important to measure the process of each layer. [0003] Figure 1a and Figure 1b Shows the current structure of testing GI (Gate Insulation, gate insulation layer) breakdown voltage, Figure 1a It is the plan view of TFT (Thin Film Transistor, Thin Film Field Effect Transistor), Figure 1b for Figure 1a In the cross-sectional view at the dotted line, a voltage is applied to the source / ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/12
CPCG01R31/129
Inventor 刘振定左博文安亚斌蔺聪
Owner BOE TECH GRP CO LTD